3DNOW! Command Concise Reference

xiaoxiao2021-03-06  40

3DNOW! Command Concise Reference

Directive description algorithm

FEMMS quickly switches 3DNOW! / MMX instructions and floating point command status.

PAVGUSB Mmreg1, the Mmreg2 / MEM64 8-bit unsigned compression integer summary. Mmreg1 [63:56] = (mmReg1 [63:56] mmreg2 / mem64 [63:56] 1) / 2

Mmreg1 [55:48] = (mmReg1 [63:56] mmreg2 / mem64 [63:56] 1) / 2

Mmreg1 [47:40] = (mmReg1 [63:56] mmreg2 / mem64 [63:56] 1) / 2

Mmreg1 [39:32] = (mmReg1 [63:56] mmreg2 / mem64 [63:56] 1) / 2

Mmreg1 [31:24] = (mmReg1 [63:56] mmreg2 / mem64 [63:56] 1) / 2

Mmreg1 [23:16] = (mmReg1 [63:56] mmreg2 / mem64 [63:56] 1) / 2

Mmreg1 [15:08] = (mmReg1 [63:56] mmreg2 / mem64 [63:56] 1) / 2

mmreg1 [07:00] = (mmReg1 [63:56] mmreg2 / mem64 [63:56] 1) / 2

PF2ID mmReg1, MmReg2 / MEM64 converts the compressed floating point to 32-bit compressed integer. IF (mmReg2 / MEM64 [31: 0]> = 231)

MmReg1 [31: 0] = 7FFF_FFFFH

Else

{

IF (mmReg2 / MEM64 [31: 0] <= -231)

Mmreg1 [31: 0] = 8000_0000h

Else

Mmreg1 [31: 0] = INT (mmReg2 / MEM64 [31: 0])

}

IF (mmReg2 / mem64 [63:32]> = 231)

Mmreg1 [63:32] = 7FFF_FFFFH

Else

{

IF (mmReg2 / mem64 [63:32] <= -231)

mmreg1 [63:32] = 8000_0000h

Else

mmreg1 [63:32] = int (mmReg2 / mem64 [63:32])

}

PFACC mmReg1, MmReg2 / MEM64 compressed floating point number is accumulated. Mmreg1 [31:00] = mmreg1 [31:00] mmreg1 [63:32]

Mmreg1 [63:32] = mmreg2 / mem64 [31:00] mmreg2 / mem64 [63:32]

PfAdd MmReg1, MmReg2 / MEM64 compressed floating point number is added. Mmreg1 [31:00] = mmreg1 [31:00] mmreg2 / mem64 [31:00]

Mmreg1 [63:32] = mmreg1 [63:32] mmreg2 / mem64 [63:32]

PFCMPEQ MmReg1, MmReg2 / MEM64 compares whether the compressed floating point is equal. IF (mmReg1 [31:00] == mmreg2 / mem64 [31:00])

mmreg1 [31:00] = fff_ffffh

Else

mmreg1 [31:00] = 0000_0000h

IF (mmReg1 [63:32] == mmreg2 / mem64 [63:32])

mmreg1 [63:32] = fff_ffffh

Else

MmReg1 [63:32] = 0000_0000HPFCMPGE MmReg1, MmReg2 / MEM64 is "greater than or equal" for compressed floating point numbers. IF (mmReg1 [31:00]> = mmreg2 / mem64 [31:00])

mmreg1 [31:00] = fff_ffffh

Else

mmreg1 [31:00] = 0000_0000h

IF (mmReg1 [63:32]> = mmreg2 / mem64 [63:32])

mmreg1 [63:32] = fff_ffffh

Else

mmreg1 [63:32] = 0000_0000h

PFCMPGT MmReg1, MmReg2 / MEM64 is "greater than" on whether the compressed floating point number is "greater than". IF (mmReg1 [31:00]> mmreg2 / mem64 [31:00])

mmreg1 [31:00] = fff_ffffh

Else

mmreg1 [31:00] = 0000_0000h

IF (mmReg1 [63:32]> mmreg2 / mem64 [63:32])

mmreg1 [63:32] = fff_ffffh

Else

mmreg1 [63:32] = 0000_0000h

Pfmax mmReg1, MmReg2 / MEM64 compressed floating point count number of maximum values. IF (mmReg1 [31:00]> mmreg2 / mem64 [31:00])

mmreg1 [31:00] = mmreg1 [31:00]

Else

Mmreg1 [31:00] = mmreg2 / mem64 [31:00]

IF (mmReg1 [63:32]> mmreg2 / mem64 [63:32])

Reg1 [63:32] = mmReg1 [63:32]

Else

Reg1 [63:32] = mmReg2 / MEM64 [63:32]

Pfmin mmReg1, MmReg2 / MEM64 compressed floating point count number minimum. IF (mmReg1 [31:00]

mmreg1 [31:00] = mmreg1 [31:00]

Else

Mmreg1 [31:00] = mmreg2 / mem64 [31:00]

IF (mmReg1 [63:32]

mmreg1 [63:32] = mmreg1 [63:32]

Else

Mmreg1 [63:32] = mmreg2 / mem64 [63:32]

Pfmul mmreg1, MmReg2 / MEM64 compressed floating point number multiplication operation. mmreg1 [31:00] = mmreg1 [31:00] * mmreg2 / mem64 [31:00]

Mmreg1 [63:32] = mmreg1 [63:32] * mmreg2 / mem64 [63:32]

The approximate value of the PFRCP mmreg1 and MmReg2 / MEM64 compressed floating point count. Mmreg1 [31:00] = 1.0F / mmreg2 / mem64 [31:00]

mmreg1 [63:32] = 1.0F / mmreg2 / mem64 [31:00]

PFRCPIT1 MmReg1, MmReg2 / MEM64 The first step of compressed floating point numbers to the fewer.

The second step of iteration of the reciprocal (or the countdown of floating point square root) of PFRCPIT2 mmReg1, MmReg2 / MEM64 compressed floating point number.

Pfrsqit1 mmReg1, MmReg2 / MEM64 The first step of the reciprocal iteration of the square root of the floating point number.

Pfrsqrt mmReg1, MmReg2 / MEM64 finds an approximate value of the reciprocal of floating point square roots. mmreg1 [31:00] = 1.0F / SQRT (mmReg2 / MEM64 [31:00])

Mmreg1 [63:32] = 1.0F / SQRT (mmReg2 / MEM64 [31:00]) PFSUB mmReg1, MmReg2 / MEM64 compressed floating point number subtraction operation. MmReg1 [31:00] = mmreg1 [31: 0] - mmreg2 / mem64 [31:00]

Mmreg1 [63:32] = mmreg1 [63:32] - mmreg2 / mem64 [63:32]

Pfsubr mmreg1, MmReg2 / MEM64 compressed floating point number reverse subtraction operation. Mmreg1 [31:00] = mmreg2 / mem64 [31:00] - mmreg1 [31:00]

Mmreg1 [63:32] = mmreg2 / mem64 [63:32] - mmreg1 [63:32]

PI2FD MmReg1, MmReg2 / MEM64 converts compressed 32-bit integers into floating point numbers. mmreg1 [31:00] = float (mmreg2 / mem64 [31:00])

mmreg1 [63:32] = float (mmreg2 / mem64 [63:32])

Pmulhrw mmreg1, MREG2 / MEM64 multiplied 16-bit symbolic compression integers and looped. Save 16-bit high. Mmreg1 [63:48] = (mmReg1 [63:48] * mmreg2 / mem64 [63:48] 8000H) >> 16

Mmreg1 [47:32] = (mmreg1 [47:32] * mmreg2 / mem64 [47:32] 8000H) >> 16

Mmreg1 [31:16] = (mmReg1 [31:16] * mmreg2 / mem64 [31:16] 8000H) >> 16

MmReg1 [15:00] = (mmreg1 [15:00] * mmreg2 / mem64 [15:00] 8000H) >> 16

Prefetch (W) MEM8 data prefetch instructions put the data to be used in the L1 data cache.

3DNOW! Expanded instruction concise reference

Directive description algorithm

PF2IW MEMREG1, MEMREG2 / MEM64 converts the compressed floating point number to 16-bit integers. IF (mmReg2 / MEM64 [31:00]> = 215)

mmreg1 [31:00] = 0000_7FFFH

Else

{

IF (mmReg2 / MEM64 [31:00] <= -215)

mmreg1 [31:00] = fff_8000h

Else

Mmreg1 [31:00] = INT (mmreg2 / mem64 [31:00])

}

IF (mmReg2 / mem64 [63:32]> = 215)

Mmreg1 [63:32] = 0000_7fffh

Else

{

IF (mmReg2 / MEM64 [63:32] <= -215)

mmreg1 [63:32] = fff_8000h

Else

mmreg1 [63:32] = int (mmReg2 / mem64 [63:32])

}

PFNAcC mmreg1, mmreg2 / MEM64 compressed floating point number is reduced by mmreg1 [31:00] = mmreg1 [31:00] - mmreg1 [63:32]

Mmreg1 [63:32] = MemReg2 / MEM64 [31: 0] - Memreg2 / MEM64 [63:32]

Pfpnacc mmReg1, MREG2 / MEM64 compressed floating point number mixed or decrease mmreg1 [31:00] = mmReg1 [31:00] - mmreg1 [63:32]

Mmreg1 [63:32] = MemReg2 / MEM64 [31:00] Memreg2 / MEM64 [63:32]

PI2FW mmreg1, mmReg2 / MEM64 compressed 16-bit integer transformation into floating point number mmreg1 [31:00] = float (mmReg2 / MEM64 [15:00])

mmreg1 [63:32] = float (mmreg2 / mem64 [47:32])

Pswapd mmreg1, mmreg2 / MEM64 compression exchange double word mmreg1 [63:32] = mmReg2 / mem64 [31:00]

mmreg1 [31:00] = mmreg2 / mem64 [63:32]

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