Write makefile with me (10)

FOREACH function

The Foreach function is very different from other functions. Because this function is used for looping, the Foreach function in the makefile is almost in the FOR statement in the UNIX standard shell (/ bin / sh), or the Foreach statement in the c-shell (/ bin / csh). Built. Its syntax is:

$ (Foreach , , )

This function means that the words in the parameter are taken out one by one on the variable specified by the parameter , and then the expression included in is executed. Each time returns a string, and each character returned by is separated in a space, and finally each string returned by The entire string (separated in space) will be the return value of the foreach function.

Therefore, is preferably a variable name, can be an expression, and in is usually enumerated in ["words in [TEXT". for example:

Names: = a b c d

Files: = $ (Foreach N, $ (Names), $ (N) .o)

In the above example, the words in the $ (name) will be taken out, and save the variable "n", "$ (n) .o" calculates a value each time according to "$ (N)", these values Space separation, finally the return as a Foreach function, so (files) value is "AO BO CO DO".

Note that parameters in Foreach are a temporary local variable. After the foreach function is executed, the variables of parameter will not function, and its scope is only in the foreach function.

V. IF functions

The IF function is very similar to the conditional statement supported by the GNU's Make - IFEQ (see the chapter described earlier), the syntax of the IF function is:

$ (if , )

Or

$ (if , )

It can be seen that the IF function can contain "ELSE" sections, or not. That is, the parameter of the IF function can be two or three. The parameter is an expression of IF. If it returns a non-empty string, then this expression is equivalent to returning, so will be calculated, otherwise will be calculated .

The return value of the IF function is if is a true (non-empty string), that will be the return value of the entire function, if is a false (empty string), then will be the return value of the entire function, if is not defined, the entire function returns the empty string.

Therefore, and

Sixth, Call function

The Call function is the only function that can be used to create new parameters. You can write a very complex expression. In this expression, you can define many parameters, then you can use the Call function to pass parameters to this expression. Its syntax is: $ (Call , , , ...)

When Make performs this function, the variables in the parameter, such as $ (1), $ (2), $ (3), will be replaced in turn by parameter , , . The return value of is the return value of the Call function. For example: Reverse = $ (1) $ (2)

Foo = $ (Call Reverse, A, B)

So, the value of foo is "a b". Of course, the order of the parameters can be customized, not necessarily the order, such as:

REVERSE = $ (2) $ (1)

Foo = $ (Call Reverse, A, B)

The value of the FOO at this time is "B A".

Seven, Origin functions

The Origin function is not like other functions, he does not operate the value of the variable, he just tells you where your variable is coming? Its syntax is:

$ (Origin )

Note that is the name of the variable, should not be referenced. So you'd better use the "$" character in . The origin function tells you the "birth situation" of this variable with its return value. Below, it is the return value of the origin function:

"Undefined"

If has never defined, the origin function returns this value "undefined".

Default "

If is a default definition, such as "CC" variable, this variable we will tell later.

"Environment"

If is an environment variable, the "- e" parameter is not opened when Makefile is executed.

File

If This variable is defined in the makefile.

"Command Line"

If This variable is defined by the command line.

"OVERRIDE"

If is redefined by the OVERRIDE indicator.

Automatic "

If is an automated variable in the run. About automation variables will be described later.

This information is very useful for we write makefile, for example, suppose we have a Makefile package that packs a definition file Make.def, defined a variable "Bletch" in make.def, and there is an environment variable in our environment "BLETCH", at this time, we want to judge, if the variable comes from the environment, then we will redefine it, if you come from the Make.DEF or the command line, then we don't redefine it. So, in our makefile, we can write this:

IFDEF BLETCH

Ifeq "$ (Origin Bletch)" Environment "

Bletch = BARF, GAG, ETC.

ENDIF

ENDIF

Of course, you may say that you can redefine the variables in the environment using the Override keyword? Why do you need this step? Yes, we use Override to achieve such an effect, but Override is too rude, it will overwrite the variables defined from the command line, and we just want to redefine the environment, and do not want to redefine the command line Come. Eight, shell function

The shell function is not like other functions. As the name suggests, its parameters should be the command of the operating system shell. It and the reverse "` "are the same function. That is to say, the shell function returns the output after executing the operating system command as a function. Thus, we can generate a variable with an operating system command and a string handle command awk, sed, etc., such as:

Contents: = $ (Shell Cat Foo)

Files: = $ (shell echo * .c)

Note that this function will generate a shell program to execute the command, so you have to pay attention to its run performance, if you have some complicated rules in your makefile, and use this function, so you are harmful to your system performance. . Especially the macked rules of makefile may make your shell function to do much more than what you imagine.

Nine, control the function of MAKE

Make provides some functions to control the operation of Make. Typically, you need to detect some runtime information when running makefile, and determine this information, you let Make continue, or stop.

$ (Error )

Generate a fatal error, is an error message. Note that the Error function will not generate error messages in one use, so if you define it in a certain variable, it is also possible to use this variable in a subsequent script. E.g:

Example 1:

IFDef Error_001

$ (Error Error IS $ (Error_001))

ENDIF

Example 2:

Err = $ (Error Found An Error!)

.Phony: ERR

Err:; $ (ERR)

The example will generate an Error call when the variable error_001 is defined, and the example two will occur when the directory ERR is executed.

$ (WARNING )

This function is like an Error function, but it does not let Make exits, just output a warning message, and make continues.

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