Several questions that use this network card chip need to pay attention to
1. SWFDUP in Transmit Control Register is used to control DUPLEX mode, and FDUPLX is not
2, the use of autonegotiation, need to strictly follow the requirements of the document, waiting for 1.5 seconds each time
3, MMU, 91C111 use more advanced memory management mode, when the processor wants to use it, you need to allocate memory to get a packet number, and you need to remove from the Allocation Result Register, fill in Packet Number Register. Then you have to write the Pointer Register, then write the data you want to send to the SRAM in 91C111, perform the Enqueue Packet Number to TX FIFO command of the MMU, and wait for the delivery to complete.
Here are a few concepts:
A, Packet Number, for sending a packet number value requested from the MMU, for receiving, this packet number is actually from the MMU, but is not applied by the processor, but applied by the CSMA / CD module .
B, TX / RX Area refers to memory in SRAM corresponding to Packet Number
C, FIFO PORTS Register, putting packet number in Packet Number
D, Pointer Register refers to the pointer of the SRAM corresponding to the current packet number
4, MULTICAST TABLE REGISTERS consists of 8 registers, uses the Hash Value in the Recivie Frame Status Register for the address filter.
Hash Value = MOST 6 Significant Bit (Destination Address from Received Packet)
BISH VALUE BITS 5, 4, 3, one of the 8 Multicast Table Registers (known as a), BITS 2, 1, 0 Select a bit in A, if this location, then, Filter passed, otherwise ,Fail.
5. Phycial register needs to use the Management Interface register according to documentation requirements, serial settings