System Management Bus (SMBUS) Specification (Official Website)
http://www.smbus.org/index.html
I2C and SMBUS Framework
http://people.freebsd.org/~nsouch/iicbus.html
Introduction
I2C is an acronym for Inter Integrated Circuit bus. The I2C bus was developed in the early 1980's by Philips semiconductors. It's purpose was to provide an easy way to connect a CPU to peripheral chips in a TV-set.
I2C is a referred to as an interconnected integrated circuit. The I2C was developed by Philips in the early 1980s. The initial development purpose is to connect to the CPU and the peripheral chip in the TV.
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Every component hooked up to the bus has its own unique address whether it is a CPU, LCD driver, memory, or complex function chip. Each of these chips can act as a receiver and / or transmitter depending on it's func- tionality. Obviously an LCD Driver Is Only A Receiver, While A Memory Or I / O Chip Can Both Be Transmitter and Receiver. Furthermore The BE BE ONE OR MORE BUS MASTER'S.
The BUS MASTER is the chip issuing the commands on the BUS. In the I2C protocol specification it is stated that the IC that initiates a data transfer on the bus is considered the BUS MASTER. At that time all the others are regarded to as the BUS Slaves. AS Mentioned Before, The IC Bus Is A Multi-Master Bus. This Means That More Than IC Capable of INITITING DATA TRANSFER CAN Be Connected To IT.
The bus consists of two actual data lines (2 passages) and a ground wire. These two data lines are called SDA and SCLs, all of which are bidirectional. Where SDA is a serial data cable, SCL is a serial clock line. Each device hanging on the bus has its own unique address to determine what device, such as CPU, LCD Driver, Memory, or a complex function chip. Each chip device can be used as a data receiver, or as a data transfer person, there is different depending on the specific function implementation. Obviously, the LCD Driver can only be a data recipient (?), While the Memory and I / O chips are the same as the data recipient and delivery. In addition, one or more BUS controllers can be present in the system. The BUS controller is a chip that sends commands to the bus. Device for starting a data transfer on the bus is referred to as a bus controller. At the same time, other devices are called Bus Slave. As mentioned earlier, the IC bus is a bus with multiple MASTERs.
SMBUS
The System Management Bus Is A Two-Wire Interface WHICH SIMPLE POWER-Related Chips Can Communicate With rest of the system. Its Iicbus (4)).
A System Using SMB Passs Messages To and from Devices INSTEAD OF TRIP- PING INDIVIVIDUAL Control Lines.
The SMB bus is a 2-way interface. Simple chips can be communicated with other devices in the system via this interface. The SMB bus is implemented based on I2C.
With the SMBus, a device can provide manufacturer information, tell the system what its model / part number is, save its state for a suspend event, report different types of errors, accept control parameters, and return its status.
With the SMBus bus, the device can provide its own manufacturer information, tell the system its own model, save the status when there is a suspended event, report a variety of different types of errors, accept the control parameters, and return itself.
The SMBus may share the same host device and physical bus as ACCESS bus components provided that an appropriate electrical bridge is provided between the internal SMB devices and external ACCESS bus devices.
Supported Interfaces
Various I2C and SMBus Controllers Drivers Are Provided by the Iicbus Framework:
AMD 756 with amdpm (4) Intel ServerWorks with ichsmb (4) VIA family with viapm (4) Acer Aladdin VI / V / Pro2 with alpm (4) Intel PIIX4 interface with intpm (4) Philips PCF8584 master / slave interface with pcf ( 4) Generic Bit-Banging Master-Only Driver with Iicb (4) Parallel Port Specific Bit-Briting Interface LPBB (4) Brooktree848 Video Chipset, Hardware and Software Master-Only Interface with bktr (4) SMBUS
http://www.interfacebus.com/design_connector_smbus.html
