Reliable and fast in digital communication systems are often a pair of contradictions. If it is required to be fast, it will inevitably make each data symbol occupy the time, the waveform is narrowed, the energy is reduced, thereby increasing the possibility of incorrectly after being interfered, and the reliability of transmitting information is lowered. If reliable is required, the transmission message is slowed down. Therefore, how to reasonably resolve the reliability and speed this pair of contradictions, is one of the key issues that correctly design a communication system. In order to ensure the correctness of the transmission process, it is necessary to perform errors control over the communication process. The most common method of error control is to automatically request the retransmission mode (ARQ), forward error correction mode (FEC) and mixed error correction (HEC). When the transmission process is relatively low, it is ideal with FEC mode. When the transmission process is high, it is easy to "chaos" phenomenon using FEC. HEC mode The combination of ARQ and FEC. In many digital communication, ARQ mode is widely used, and the error control at this time only needs to detect the error. There are many error-controlled methods that implement the error detection function. Traditional: parity, checksum detection, repetition check, expansion code check, row redundancy check, etc., these methods are redundant The balance is sent to the receiving end together. The received data is the same verification, and then the resulting check code is compared to the received check code, if the two consistent, it is considered to be correct. But these methods have their own disadvantages, and the probability of misjudgment is relatively high.
The cycle redundancy check CRC (CYCLIC Redundancy Check) is a branch of the packet line, and its main application is a binary code group. The encoding is simple and the error probability is very low, and a wide range of applications are obtained in the communication system. The following focuses on the principle of CRC verification and its algorithm implementation.
I. Circular redundant check code (CRC)
The CRC check is used in a polynomial coding method. The processed data block can be seen as a n-order binary polynomial, by
. Such as an 8-bit binary number 1011010 can be represented as:
. The polynomial multiplier operation process is the same as the normal algebraic polynomial. Multi-class add-oriented operations are not in 2 as 2 as the mold, and the addition or subtraction is not in, misplaced, and logical varying or calculation.
When using a CRC check, the sender and the receiver use the same generated polynomial G (X), and the first bit of G (x) must be 1. The method of processing the CRC is that the sender removes T (X) by g (x) to obtain the remainder as a CRC check code. When the calibration is calculated as 0, it is determined whether the data frame is wrong.
The CRC check can be detected by 100% of all odd random errors and lengths of less than or equal to K (k as g (x) steps). Therefore, the higher the class of the CRC generated polynomial, the smaller the probability of misjudgment. CCITT recommends: 2048 kbit / s PCM base group equipment adopts CRC-4 scenario, using CRC check code generation polynomial g (x) =
. With a 16-bit CRC check, it can be guaranteed
Bit symbols contain only one unspected error
. In the frame test sequence FCS of IBM's synchronous data link control procedure SDLC, CRC-16 is used, which generates polynomial g (x) =
In the case of the CCIC's frame test sequence FCS, it is used in the frame verification sequence FCS recommended by CCITT, which generates polynomial g (x) =
. CRC-32 generated polynomial g (x) =
. CRC-32 error probability is lower than CRC-16
Multiplication
. Due to the reliability of CRC-32, the CRC-32 is used for important data transmission, so it is widely used in communication, computers. In some UART communication control chips (such as MC6582, Intel8273, and Z80-Si), CRC check code is used for error control; Ethernet card chips, MPEG decoding chips, also using CRC-32 in error control. Second, the algorithm analysis of CRC check code
The encoding method of the CRC check code is to divide the binary data T (X) to be transmitted to generate a polynomial G (X), and the last remainder is used as the CRC check code. The actual steps are as follows:
(1) The data block that is sent is the binary polynomial T (X) of the M bits, and generates a poly-based G (x). Add R 0 at the end of the data block, the length of the data block is increased to the M R bit, and the corresponding binary polynomial is
.
(2) Removing by generating polynomial g (x)
, The remainder is the binary polynomial y (x) of the order of R-1. This binary polynomial y (x) is T (X) to generate a CRC check code encoded by polynomial G (X).
(3)
Less y (x) in mode 2, resulting in binary polynomial
.
It is a string to be sent to the CRC check code.
As can be seen from the CRC encoding rule, the CRC encoding is actually converted to the M-bit binary polynomial T (X) transmitted into a M R bit binary polynomial that can be removed by G (X).
Therefore, it can be used to remove G (x) when decoding, if the remainder number is zero, then the transmission process is not error; if the remainder is not zero, there is certain an error during the transmission process. Many CRC hardware decoding circuits are detected in this way. at the same time
It can be seen as a combination of T (X) and CRC check code, so decoding the received binary data removes the R bit data of the tail, which is the original data.
In order to understand the encoding process of the CRC check code, the encoding process of the CRC check code is described below with a simple example. Due to the basis of CRC-32, CRC-16, CCITT and CRC-4, only bit numbers and generated polynomial are different. In order to describe simple, an example of CRC encoding is used to illustrate the encoding process of the CRC.
The data T (X) of the transmitted data T (X) is 12 bits of binary data 100100011100; the generation polynomial of CRC-4 is g (x) =
The order R is 4, that is, 10011. First add 4 0 configurations at the end of T (X)
The data block is 1001000111000000. Then remove with G (x)
Need much not to use the business, only the remainder y (x) is required. The following table shows the division process.
Divultiple
Detailed / g (x) / result
remainder
0
1 0010001110000000000
100111000000
1 0011
0 000100111000000
1
1 00111000000
1000000
1 0011
0 00001000000
2
1 000000
1100
1 0011
0 001100
As can be seen from the table above, the CRC encoding is actually a circular shift model 2 operation. For CRC-4, we assume that there is a 5 bits register, by repeated displacement and CRC division, the value in the final register is the remainder of the value we require. So you can use the following steps to describe the following process: // reg is a 5 bits register
Set the value in REG 0.
Add r 0 after the original data.
While (data is not processed)
Begin
IF (REG first is 1)
REG = REG XOR 0011.
Move the value in the REG one bit to read a new data and placed in the position of the REGISTER's 0 bit.
End
The last four of REG is the remainder we have requested.
This algorithm is simple, easy to implement, and G (x) generated in any length is applicable. Under the case where the data is transmitted, it can be used. But if the data block sent is long, this method is not suitable. It can only handle one data at a time, the efficiency is too low. In order to improve the processing efficiency, 4 bits, 8 bits, 16 bits, 32 bits can be treated once. Since the structure of the processor basically supports processing of 8-bit data, the 8 bit is appropriate at a time.
In order to have an intuitive understanding of the optimized algorithm, first change the above algorithm to an angle. In the above example, the encoding process can be regarded as the following process:
Since it only takes the remainder, we only look at the last four. Constructs a four-bit register REG, the initial value is 0, and the data is moved into REG (0 bits), and the data of REG3 is removed from REG. There is a above algorithm that the REG is 0 when the data is 0 when the data is removed; when the transferred data is 0, the REG does not perform XOR operation with G (X), quite equal to 0000 Xor operation. That is to say, REG and what kind of data is determined by XOR removal. Since there is only one bit, there is
Selection. The above algorithm can be described below,
// reg is a 4 bits register
Initialization T [] = {0011,0000}
Set the value in REG 0.
Add r 0 after the original data.
While (data is not processed)
Begin
Move the value in the REG one bit to read a new data and placed in the position of the REGISTER's 0 bit.
REG = REG XOR T [Displacement]
End
The above algorithm is processed in bits, and the above algorithm can be extended to 8 bits, i.e., by BYTE, ie CRC-32. Constructs a four Byte's register REG, the initial value is 0x00000000, and the data is subjected to REG0 (0 bytes of REG, similar), and the data of REG3 moves out of REG. Push it in the above algorithm class to determine the REG and what data is made by the above algorithm class. Because there are 8 Bit, there is
Selection. The above algorithm can be described as follows:
// reg is a 4 Byte register
Initialization T [] = {...} //
= 256 items
Set the value in REG 0.
Add R / 8 0 bytes after the original data.
While (data is not processed)
Begin
Move the values in the REG one byte to read a new byte and placed in the 0th Byte of REG.
REG = REG XOR T [Moved byte]
End
The basis of the algorithm is related to the nature of the polynomial division. If a M bit of the polynomial T (X) is divided by a R order to generate polynomial G (X),
Will each one
(0 = The obtained is T (X) by the remaining form that generated polynomial G (X). For CRC-32, each byte can be made up of 32 0 to the generated polynomial, and the unique correspondence of the 余 and this byte is the value of the above algorithm T []. One byte is 8 bits, so T [] has a total = 256 items. The nature of the polynomial operation can be found in the reference [1]. This algorithm is processed each time, and the operation is greatly improved by the check form method, which is greatly improved, so that most applications are used. Third, the process of CRC-32. In order to improve the coding efficiency, most of the investigation form method is used in the actual application to complete the CRC-32 check, the following is a subroutine that generates a CRC-32 check. Unsigned long crc_32_tab [256] = { 0x00000000, 0x77073096, 0xee0E612C, 0x990951BA, 0x076DC419, 0x706AF48F, 0xE963A535, 0x9E6495A3, 0X0EDB8832, ..., 0x5A05DF1B, 0x2D02EF8D }; // The pre-calculated parameter table, a total of 256 items, not listed. Unsigned long generatecrc32 (Char XData * Database, unsigned long gs) { UNSIGNED Long OldCrC32; UNSIGNED Long CRC32; Unsigned long oldcrc; Unsigned int carcnt; CHAR C, T; OldCrC32 = 0x00000000; // At 0 CHARCNT = 0; While (len -) { T = (OldCrC32 >> 24) & 0xff; // The value of the byte to be removed OldCrc = CRC_32_TAB [T]; / / / / According to the value of the transmitted byte C = databuf [charcnt]; / / newly moving byte value OldCrC32 = (OldCrc32 << 8) | C; // Add newly moving byte value in the last byte of the register OldCrc32 = OldCrc32 ^ OldCrc; // Put the register with the Isolated value XOR operation CHARCNT ; } CRC32 = OldCrC32; Return CRC32; } The parameter table can be calculated on the PC, or it can be done when the program is initialized. Below is a C language subroutine for calculating the parameter table, compiling under Visual C 6.0. #include Unsigned long int crc32_table [256]; Unsigned long int ULPOLYNOMIAL = 0x04c11db7; Unsigned long int REFLECT (Unsigned long int REF, CHAR CH) {UNSIGNED long int value (0); / / Exchange Bit0 and Bit7, Bit1 and Bit6, class push For (int i = 1; i <(CH 1); i ) {IF (Ref & 1) Value | = 1 << (CH - I); REF >> = 1; Return Value; INIT_CRC32_TABLE () {Unsigned long int CRC, TEMP // 256 values For (int i = 0; i <= 0xff; i ) {TEMP = Reflect (i, 8); CRC32_TABLE [I] = TEMP << 24; For (int J = 0; J <8; J ) { UNSIGNED Long Int T1, T2; Unsigned long int flag = crc32_table [i] & 0x80000000; T1 = (CRC32_TABLE [i] << 1); IF (Flag == 0) T2 = 0; Else T2 = ulpolynomial; CRC32_TABLE [I] = T1 ^ T2;} CRC = CRC32_TABLE [I]; CRC32_TABLE [I] = Reflect (CRC32_TABLE [I], 32); } } Conclude CRC The check is widely used in a variety of data check applications due to its simple implementation. It takes less system resources and can be implemented with hardware and is a good means of data transmission error detection.
