OSX's start-up failed actually made the network card, Windows Linux OSX could not be a practical network card to go online, and I bought a USB network card.
See hwaddr ff: ff: ff: ff: ff: ff: ff: ff: ff: ff: ff: ff: ff: ff: ff: ff: ff: ××: × ×: ××: ××: ××: × × Set Mac enabled, Windows can also pass Set the Mac to enable, but OSX86 cannot be internetrated, and the Intel82557: COULDNT Allocate EEPROM Check CRC Error is displayed.
Fortunately, EEPRO100-DIAG is found, downloading an EEPRO100-DIAG to compile, you can write the NIC EEPROM by defining enable_hwaddr_update.
EEPRO100-DIAG -F -W -H ××: ××: ××: ××: ××: ×× Specify new address, EEPRO100-DIAG automatically calculates the CRC.
Code:
/ * EEPRO100-DIAG.C: Diagnostic and Setup Program for the Intel EEPRO100.
This is a diagnostic and eeprom setup program for the Ethernet Adapters
Based on the Intel "Speedo3" CHIP Series: The i82557, '558 and' 559.
The EtherExpress Pro100b, And EEPRO PCI 10 .
Copyright 1998-2003 by Donald Becker.
This Software May Be Used and Distributed According to the Terms of
The GNU General Public License (GPL), Incorporated Herein By Reference.
Contact The Author for Use Under Other Terms.
This Program Must Be Compiled with "-o"!
See The Bottom of this File for the suggested compile-commist.
The author may be reached as becker@scyld.com, or C / O
Scyld Computing Corporation
914 Bay Ridge Road, Suite 220
Annapolis MD 21403
Support and Updates Available At
Http://www.scyld.com/diag/index.html
Common-Sense Licensing Statement: Using Any Portion of this Program in
Your Own Program Means That You Must Give Credit To The Original Author
And Release The Resulting Code Under The GPL. To Use this code Under
Other Terms Requires An Explicit License from The Copyright Holder.
* /
Static char * version_msg =
"EEPRO100-DIAG.C: V2.13 2/28/2005 Donald Becker (becker@scyld.com) / n" "http://www.scyld.com/diag/index.html/n";
Static char * usage_msg =
"USAGE: EEPRO100-DIAG [-ADeeffGhmqrtvwwww] [-p
"For details and other options see http://www.scyld.com/diag/index.html/n";
Static const char long_usage_msg [] =
"USAGE:% s [-adfrrvvw] [-af
/ N /
Show the Internal State of a network adapter./n/N/N/N
/ N /
THE COMMON USAGE IS / N /
EEPRO100-DIAG -AEM / N /
/ N /
FREQUENTLY USED OPTIONS Are / N /
-A --SHOW_ALL_REGISTERS PRINT All Registers./N/
-E --SHOW-EEPROM DUMP EEPROM Contents, / "- EE /" shows the details./n/
-m --Show_MII Print The Mii Transceiver State / N /
USING -MM MONITORS The LINK./N/
-f --force perform operation, Even ON A Running Nic./N/
/ N /
To Operate On a Single Nic, or One That Hasn't Been Automatically Found: / N /
- # --card_num index operate on the specified card index./n/
-p --port-base oaddr assocified I / o address./n/N/port
-t --chip-type type specify adapter type (with '-p'). Use '-1' to / n /
List available type indeicies./n/N/N/
/ N /
To change the Persistent EEPROM Settings / N /
-G --Parameters Parms Set Adapter-Specific Parameters./N/
-H --New-Hwaddr 01: 23: 45: 67: 89: AB / N /
Set a new hardware station address. Typically Disabled for safe./n/
-w --write-eeprom actually write the new settings Into the EEPROM./N/
/ N /
-D --debug / n /
-v --verbose report Each action taken./n/
-V --Version Emit Version Information./N/
/ N /
-A - ADVERTISE
#if! defined (__ Optimize__)
#Warning You Must Compile This Program with The Correct Options!
#Warning See The Last Lines of the source file.
#Error You Must Compile This Driver with "-o".
#ENDIF
#include
#include
#include
#include
#include
#include
#include
#include
#include
#if defined (__ linux__) && __Gnu_library__ == 1
#include
#ELSE
#include
#ENDIF
/ * No libmii.h or libflash.h yet, thus the declarations here. * /
Extern Int Show_mii_details (Long Ioaddr, INT PHY_ID);
Extern Int Monitor_mii (Long Ioaddr, INT PHY_ID);
/ * Simple Alternate Functions if libmii is not ready. * /
Extern int monitor_mii (long oaddr, int pHY_ID) __ATTRIBUTE __ ((WEAK));
Extern int show_mii_details (long oaddr, int pHY_ID) __ATtribute __ ((weak));
EXTERN INT FLASH_PCI_ROM_SHOW (long addr_ioaddr);
EXTERN INT FLASH_PCI_ROM_DUMP (Long Addr_Ioaddr, Long Data_Ioaddr,
Const char * filename);
EXTERN INT FLASH_PCI_ROM_PROGRAM (long addr_ioaddr, long Data_Ioaddr,
Const char * filename);
/ * We shop use __u8 .. __U32, but the isy area not always defined. * /
TYPEDEF U_INT32_T U32;
TYPEDEF U_INT16_T U16;
TYPEDEF U_INT8_T U8;
Struct option longopts [] = {
/ * {Name HAS_ARG * FLAG VAL} * /
{"Card-Num", 1, 0, '#'}, / * Operate on The Specified Card Index. * /
{"Advertise", 1, 0, 'a'},
{"Base-Address", 1, 0, 'p'},
{"Show_all_registers", 0, 0, 'A'}, / * print all registers. * /
{"Help", 0, 0, 'h'}, / * print a long usage message. * /
{"Show-EEPROM", 0, 0, 'E'}, / * Dump EEPROM Contents (-ee valid). * /
{"Emergency-Rewrite", 0, 0, 'e'}, / * re-write a corrupted eeprom. * /
{"force-detection", 0, 0, 'f'},
{"New-Interface", 1, 0, 'F'}, / * new interface (Built-in, Aui, etc.) * /
{"new-hwaddr", 1, 0, 'h'}, / * set a new hardware address. * /
{"Show-MII", 0, 0, 'm'}, / * dump mii management registers. * /
{"Port-Base", 1, 0, 'p'}, / * use the specified I / o address. * /
{"quiet", 0, 0, 'q'}, / * decrease verbosity * /
{"Restart", 0, 0, 'R'}, / * restart autonegotiath. * /
{"reset", 0, 0, 'r'}, / * reset the transceiver. * /
{"Chip-Type", 1, 0, 't'}, / * Assume the specified chip type index. * /
{"TEST", 0, 0, 't'}, / * do register and sram test. * /
{"Verbose", 0, 0, 'v'}, / * verbose mode * /
{"Version", 0, 0, 'v'}, / * display version number * /
{"WRITE-EEPROM", 1, 0, 'W'}, / * actually write the eeprom with new value * /
{0, 0, 0, 0}
}
Extern Int EEPRO100_DIAG (int spend_id, int dev_id, long oaddr, int part_idx);
/ * The Table of Known Chips.
Because of the bogus / proc / pci interface we must have Both The Exact
Name from the Kernel, a common name and the pci vendor / device IDS.
THIS TABLE IS Searched in Order: Place Specific Entries Followed by
'catch-all' general entries. * / struct pcidev_entry {
Const char * part_name;
Const char * proc_pci_name;
INT VENDOR, Device, Device_Mask
Int flags;
INT IO_SIZE;
INT (* diag_func) (int Vendor_ID, int device_id, long oaddr, int part_idx);
} pcidev_tbl [] = {
{"Intel i82557 / 8/9 ETHEREXPRESSPRO100", "Intel 82557",
0x8086, 0x1229, 0xfff, 0, 0x20, EEPRO100_DIAG},
{"Intel 82559er ethereExpresspro / 100 ", 0,
0x8086, 0x1209, 0xfff, 0, 0x20, EEPRO100_DIAG},
{"Intel EthereXpressPro100 Type 1029", 0,
0x8086, 0x1029, 0xfff, 0, 0x20, EEPRO100_DIAG},
{"Intel Inbusiness I82559, 0,
0x8086, 0x1030, 0xfff, 0, 0x40, EEPRO100_DIAG},
{"Intel i82562 PRO / 100 V", 0,
0x8086, 0x2449, 0xfff, 0, 0x40, eepro100_diag},
{"Intel Pro / 100 Ve (Type 1031)", 0,
0x8086, 0x1031, 0xfff, 0, 0x40, EEPRO100_DIAG},
{"Intel PRO / 100 VM-1038", 0,
0x8086, 0x1038, 0xfff, 0, 0x40, EEPRO100_DIAG},
{"Intel PRO / 100 VM-1039", 0,
0x8086, 0x1039, 0xfff, 0, 0x40, EEPRO100_DIAG},
{"Intel Pro / 100 VE-103A", 0,
0x8086, 0x103a, 0xfff, 0, 0x40, EEPRO100_DIAG},
{"Intel Pro / 100 VE-103B", 0,
0x8086, 0x103b, 0xfff, 0, 0x40, EEPRO100_DIAG},
{"Intel Pro / 100 VE-103D", 0,
0x8086, 0x103d, 0xfff, 0, 0x40, EEPRO100_DIAG},
{"Intel Pro / 100 Ve-Unknown (1030 Series", 0,
0x8086, 0x1030, 0xfff0, 0, 0x40, EEPRO100_DIAG},
{0, 0, 0, 0},
}
INT Verbose = 1, OPT_F = 0, Debug = 0;
INT Show_regs = 0, show_eeprom = 0, show_mii = 0;
Unsigned int Opt_a = 0, / * show-all-interfaces flag. * /
OPT_RESTART = 0,
OPT_RESET = 0,
OPT_WATCH = 0,
OPT_G = 0;
Unsigned int opt_gpio = 0; / * general purpose I / o setting. * / int do_write_eep = 0, do_test = 0;
INT NWAY_ADVERTISE = 0, fixed_speed = -1;
INT new_default_media = -1;
/ * Valid with libflash only. * /
Static unsigned int Opt_flash_show = 0;
Static char * OPT_FLASH_DUMPFILE = NULL, * OPT_FLASH_LOADFILE = NULL;
Static unsigned char new_hwaddr [6], set_hwaddr = 0;
Static int encemergency_rewrite = 0;
Static int scan_proc_pci (int CARD_NUM);
Static int parse_media_type (const char * capabilities);
Static int GET_MEDIA_INDEX (Const Char * Name);
int
Main (int Argc, char ** argv)
{
INT port_base = 0, chip_type = 0;
INT Errflag = 0, show_version = 0;
INT C, Longind;
INT CARD_NUM = 0;
EXTERN CHAR * OPTARG;
While ((c = getopt_long (argc, argv, "#: aa: deeff: g: hh: mp: qrrt: vvwwbl: s:",
Longopts, & longind))
! = -1)
Switch (c) {
Case '#': card_num = atoi (OPTARG); BREAK;
Case 'a': show_regs ; OPT_A ; Break;
Case 'a': NWAY_ADVERTISE = PARSE_MEDIA_TYPE (OPTARG); BREAK;
Case 'D': Debug ; Break;
Case 'e': show_eeprom ; Break;
Case 'E': Emergency_rewrite ; Break;
Case 'F': OPT_F ; Break;
Case 'f': new_default_media = get_media_index (OPTARG);
IF (New_Default_Media <0)
Errflag ;
Break;
Case 'g': OPT_G ; OPT_GPIO = Strtoul (Optarg, NULL, 16); BREAK;
Case 'h': fprintf (stderr, long_usage_msg, argv [0]); return 0;
Case 'h':
{
INT HWADDR [6], i;
IF (SSCANF (OPTARG, "2X:% 2X:% 2x:% 2x:% 2x:% 2X",
Hwaddr, hwaddr 1, hwaddr 2, hwaddr 3, hwaddr 4, hwaddr 5) == 6) {
FOR (i = 0; i <6; i )
NEW_HWADDR [I] = hwaddr [i];
Set_hwaddr ;
Else
Errflag ;
Break;
}
Case 'M': Show_MII ; Break;
Case 'P':
Port_base = strtoul (Optarg, NULL, 16);
Break;
Case 'Q': if (verbose) verbose-;
Case 'R': OPT_RESTART ; Break;
Case 'R': OPT_RESET ; Break;
Case 't': chip_type = atoi (OPTARG); Break;
Case 'V': Verbose ; Break;
Case 'V': Show_Version ; Break;
Case 'W': do_write_eeprom ; Break;
Case 'W': OPT_WATCH ; Break;
Case 'b': OPT_FLASH_SHOW ; Break;
Case 'L': OPT_FLASH_LOADFILE = OPTARG; BREAK;
Case 's': OPT_FLASH_DUMPFILE = OPTARG; BREAK;
Case '?':
Errflag ;
}
IF (errflag) {
FPRINTF (stderr, usage_msg);
Return 3;
}
IF (Verbose || Show_Version)
Printf (Version_MSG);
IF (Chip_Type <0
|| CHIP_TYPE> = SIZEOF (PCIDEV_TBL) / SIZEOF (pcidev_tbl [0]) - 1) {
INT I;
FPRINTF (stderr, "Valid Numeric Chip Types Are: / N");
For (i = 0; pcidev_tbl [i] .PART_NAME; i ) {
FPRINTF (stderr, "% d / t% s / n", i, pcidev_tbl [i] .part_name);
}
Return 3;
}
/ * GET Access To All of I / O Space. * /
IF (IOPL (3) <0) {
"" NetWork Adapter Diagnostic: IOPL () ");
FPRINTF (stderr, "this program must be run as root./n");
Return 2;
}
/ * Try to read a likely port_base value from / proc / pci. * /
IF (port_base) {
Printf ("Assuming a% s adapter at% # x. / n", pcidev_tbl [chip_type] .part_name, port_base);
Pcidev_tbl [chip_type] .diag_func (0, 0, port_base, chip_type);
} else IF (scan_proc_pci (card_num) == 0) {
FPRINTF (stderr,
"Unable to find a recognized card in /proc/pci./nif there is"
"a card in the machine, explicitly set the I / o port"
"Address / n using '-p
"Use '-t -1' to see the valid chip types./n");
Return ENODEV;
}
IF (show_regs == 0 && show_eeprom == 0 && show_mii == 0)
Printf ("Use '-a' or '-aa' to show Device Registers, / N"
"'-E' to show eeprom contents, -ee for pased contents, / n"
"Or '-m' or '-mm' to show mii management registers./n");
Return 0;
}
/ * Generic (all pci diags) code to find cards. * /
Static char bogus_iobase [] =
"This Chip Has Not Been Assigned A Valid I / O Address, And Will Not Function./N"
"If you have warm-booted from another operation system, a complete / n"
"SHUT-DOWN AND POWER CYCLE MAY RESTORE THE CARD to Normal Operation./N";
Static char bogus_irq [] =
"This Chip Has Not Been Assigned a Valid Irq, And Will Not Function./N"
"This Must Be Fixed in The PCI Bios Setup. The Device Driver Has NO WAY / N"
"of Changing the PCI IRQ Settings./N"
"See http://www.scyld.com/expert/irq-conflict.html for more information./n";
Static int scan_proc_bus_pci (int CARD_NUM)
{
INT CARD_CNT = 0, CHIP_IDX = 0;
INT port_base;
Char buffer [514];
Unsigned int PCI_Bus, PCI_Devid, IRQ, PCIAddr0, PCIAddr1
INT i; file * fp = fopen ("/ proc / bus / pci / devices", "r");
IF (fp == NULL) {
IF (debug) fprintf (stderr, "failed to open /proc/bus/pci/devices./n");
Return -1;
}
While (FGETS (Buffer, Sizeof (Buffer), FP) {
IF (Debug> 1)
FPRINTF (stderr, "parsing line -% s", buffer;
IF (SSCANF (Buffer, "% X% X% X% X% X% X",
& pci_bus, & pci_devid, & Irq, & pciaddr0, & pciaddr1) <= 0)
Break;
For (i = 0; pcidev_tbl [i] .vendor; i ) {
IF ((PCI_Devid >> 16)! = pcidev_tbl [i] .vendor
|| (PCI_Devid & Pcidev_TBL [i] .device_mask! =
Pcidev_tbl [i] .device)
CONTINUE;
CHIP_IDX = I;
CARD_CNT ;
/ * SELECT The I / O Address. * /
Port_base = pciaddr0 & 1? pciaddr0 & ~ 1: pciaddr1 & ~ 1;
IF (CARD_NUM == 0 || Card_num == Card_cnt) {
Printf ("INDEX #% D: Found a% s adapter at% # x. / n",
CARD_CNT, PCIDEV_TBL [CHIP_IDX] .PART_NAME,
Port_base);
IF (IRQ == 0 || IRQ == 255)
Printf (bogus_irq);
IF (port_base)
Pcidev_tbl [chip_idx] .diag_func (0,0, port_base, i);
Else
Printf (bogus_iobase);
Break;
}
}
}
Fclose (fp);
Return Card_cnt;
}
Static int scan_proc_pci (int CARD_NUM)
{
INT CARD_CNT = 0, CHIP_IDX = 0;
CHAR CHIP_NAME [40];
File * fp;
INT port_base;
IF ((CARD_CNT = scan_proc_bus_pci (card_num))> = 0)
Return Card_cnt;
CARD_CNT = 0;
FP = FOPEN ("/ Proc / PCI", "R");
IF (fp == null)
Return 0;
{
Char buffer [514];
INT PCI_Bus, PCI_Device, PCI_Function, Vendor_ID, Device_ID;
INT State = 0;
IF (debug) Printf ("Done Open of /Proc/pci./N");
While (FGETS (Buffer, Sizeof (Buffer), FP) {
IF (Debug> 1)
FPRINTF (stderr, "parse state% d line -% s", state, buffer; if (SSCANF (Buffer, "BUS% D, Device% D, Function% D",
& PCI_Bus, & PCI_Device, & PCI_Function> 0) {
CHIP_IDX = 0;
State = 1;
CONTINUE;
}
IF (state == 1) {
IF (SSCANF (Buffer, "ethernet controller:% 39 [^ / n]",
CHIP_NAME)> 0) {
INT I;
IF (debug)
Printf ("named ethernet controller% s. / n", chip_name);
FOR (i = 0; pcidev_tbl [i] .part_name; i )
IF (pcidev_tbl [i] .proc_pci_name &&
STRNCMP (pcidev_tbl [i] .proc_pci_name, chip_name,
Strlen (pcidev_tbl [i] .proc_pci_name))
== 0) {
STATE = 2;
CHIP_IDX = I;
CONTINUE;
}
CONTINUE;
}
/ * Handle A / PROC / PCI That Does Not Recognize the Card. * /
IF (SSCANF (Buffer, "Vendor ID =% x. device ID =% x",
& vendor_id, & device_id)> 0) {
INT I;
IF (debug)
Printf ("Found Vendor 0x% 4.4x Device ID 0x% 4.4x. / N",
Vendor_ID, device_id);
FOR (i = 0; pcidev_tbl [i] .vendor; i )
IF (vendor_id == pcidev_tbl [i] .vendor &&
(Device_ID & Pcidev_TBL [i] .device_mask)
== pcidev_tbl [i] .device)
Break;
IF (pcidev_tbl [i] .vendor == 0)
CONTINUE;
CHIP_IDX = I;
STATE = 2;
}
}
IF (State == 2) {
IF (SSCANF (Buffer, "I / O at% X", & port_base)> 0) {
CARD_CNT ;
State = 3;
IF (CARD_NUM == 0 || Card_num == Card_cnt) {
Printf ("INDEX #% D: Found a% s adapter at% # x. / n",
CARD_CNT, PCIDEV_TBL [CHIP_IDX] .PART_NAME,
Port_base);
IF (port_base)
Pcidev_tbl [chip_idx] .diag_func
(Vendor_ID, Device_ID, Port_Base, Chip_IDX);
Else
Printf (bogus_iobase);
}
}
}
}
}
Fclose (fp);
Return Card_cnt;
}
/ * Convert a Text Media Name to a nway capability word. * /
Static int parse_media_type (const char * capabilities)
{
Const char * mtypes [] = {
"100baset4", "100BaseTX", "100BaseTX-FD", "100BaseTX-HD",
"10baset", "10Baset-FD", "10Baset-HD", 0,
}
Char * endptr;
INT CAP_MAP [] = {0x0200, 0x0180, 0x0100, 0x0080, 0x0060, 0x0040, 0x0020,};
INT I;
IF (debug)
FPRINTF (stderr, "Advertise String IS '% S' ./ N", Capabilities);
For (i = 0; mtypes [i]; i )
IF (StrcaseCMP (mtypes [i], capabilities == 0)
Return CAP_MAP [I];
I = Strtoul (Capabilities, & Endptr, 16);
IF (* endptr == 0 && 0
Return I;
FPrintf (stderr, "invalid Media Advertisement '% s' ./ n", Capabilities);
Return 0;
}
/ * Return the index of a valid media name.
0x0800 Power Up AutoSense (Check Speed Only Once)
0x8000 Dynamic Autosense
* /
/ * A Table of Media Names to indices. This matches the Digital Tulip
SROM Numbering, Primarily Because That Is The MOST COMPLETE LIST.
Other Chips Will Have to map..
* /
Struct {char * name; int value;} mediamap [] = {
{"10baset", 0},
{"10Base2", 1},
{"Aui", 2},
{"100BaseTX", 3},
{"10baset-fdx", 0x204},
{"100BaseTX-FDX", 0x205},
{"100Baset4", 6},
{"100Basefx", 7},
{"100Basefx-fdx", 8},
{"MII", 11},
{"Autosense", 0x0800},
{0, 0},
}
Static int GET_MEDIA_INDEX (Const Char * Name)
{
Char * endptr;
INT I;
IF (! name)
Return -1;
For (i = 0; MediaMap [i] .name; i )
IF (strcasecmp (name, mediamap [i] .name) == 0) RETURN I;
I = STRTOL (Name, & Endptr, 0);
IF (* endptr == 0)
Return I;
FPRINTF (stderr, "invalid interface specified. it must be one of / n");
For (i = 0; MediaMap [i] .name; i )
FPRINTF (stderr, "% d% s / n", mediamap [i] .value, mediamap [i] .name);
Return -1;
}
/ * Chip-specific section. * /
/ * The chip-specific section for the intel EEPRO100 DIAGNOSTIC. * /
Static char SLEEP_MODE_MSG [] =
"Sleep Mode is enabled. This is not recommented./n"
"Under High Load The Card May Not Respond TO / N"
"PCI Requests, And Thus Cause A Master Abort./N"
"To Clear Sleep Mode Use the '-g 0 -w -w -f' options./n";
Static char NO_XCVR_MSG [] =
"This nic Has no Transceiver Programmed InTo the Configuration EEPROM./N"
"This is likely a manufacturing error. It may be corrected with / n"
"Software. Contact The Board Vendor for An Update./N";
Static int tent_eeprom (long oaddr, int location, int addr_len);
Static void write_eep (Long Ioaddr, Int Index, Int Value, Int Addr_len);
Static int do_eeprom_cmd (long Ioaddr, INT CMD, INT CMD_LEN);
Static void EEPRO100_EEPROM (Unsigned Short * EE_DATA);
INT MDIO_READ (Long Ioaddr, INT PHY_ID, INT Location);
Void MDio_Write (long oaddr, int phy_id, int location; "INT value);
INT FLASH_PCI_ROM_SHOW (Long Ioaddr, Long Data) __ATTRIBUTE __ ((WEAK);
INT FLASH_PCI_ROM_DUMP (Long Ioaddr, Long Data, Const Char * FileName)
__ATtribute __ ((weak);
INT FLASH_PCI_ROM_PROGRAM (Long Ioaddr, Long Data, Const Char * FileName)
__ATtribute __ ((weak);
/ * Offsets to the various registers.
Accesses NEED NOT BE longword aligned. * /
ENUM speedo_offsets {scbstatus = 0, scbcmd = 2, / * rx / command unit command and status. * /
Scbpointer = 4, / * General purpose Pointer. * /
SCBPORT = 8, / * Misc. Commands and Operands. * /
Scbflash = 12, scbeeprom = 14, / * EEPROM AND FLASH MEMORY Control. * /
SCBCTRLMDI = 16, / * MDI interface control. * /
ScbearlyRx = 20, / * Early Receive Byte Count. * /
}
/ * The EEPROM Commands include the alway-set leading bit. * /
#define EE_WRITE_CMD (5)
#define EE_READ_CMD (6)
#define ee_erase_cmd (7)
/ * Last-Hope Recovery Major Screw-Ups: Rewrite The EEPROM with the value
From My Card (and Hope i don't met you on the net ...).
ONLY EXPERTS SHOULD USE THIS, AFTER HAND-Modifying this table. The
DEFAULT WILL PROBABLY NOT MATCH YOUR BOARD! * /
Unsigned short djb_eepro100_eeprom [64] = {
0xA000, 0x49c9, 0x87Ab, 0x0000, 0x0000, 0x0101, 0x4401, 0x0000,
0x6455, 0x2022, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0x7FCD,};
/ * VALUES Read from the EEPROM, AND THE new image. * /
UNSIGNED SHORT EEPROM_CONTENTS [256];
Unsigned short new_ee_contents [256];
INT EEPRO100_DIAG (int spend_id, int dev_id, long oaddr, int part_idx)
{
INT I;
INT PHY0, PHY1;
INT EE_ADDR_LEN = 6; / * modified below. * /
INT EEPROM_SIZE = 64, EEPROM_CHANGE = 0;
UNSIGNED Short Status = INW (IOADDR Scbstatus);
/ * It's most letter to use the EEPRO100 EEPROM AND MDIO Register During
Operation. But Warn the user, and make life pass '-f'. * /
IF (! OPT_F) {
IF (status == 0xfffff) {
Printf ("* a recognized chip Has Been Found, But it does not" "APPEAR TO EXIST IN / N * I / O SPACE. Uses"
"'-f' flag to see the register value anyway./n");
Return 1;
}
IF ((status & 0x00fc)! = 0x0000) {
Printf ("A Potential I82557 Chip Has Been Found, But It Appears To"
"be active./neither shutdown the network, or use the the"
"'-f' flag./n");
Return 1;
}
}
IF (Verbose> 1 || Show_Regs) {
Static const char * TX_STATE [] = {
"IDLE", "Suspended", "Active", "unknown"}
Static const char * rx_state [] = {
"IDLE", "iDLE / SUSPENDED", "No Resources", "unknown",
"Ready", "Broken-5", "Broken-6", "Broken-7", "Broken-8",
"Suspended - No Buffers", "No Resources - No Buffers", "Broken-11",
"Ready, But no Buffers", "Broken-13", "Broken-14", "Broken-15",
}
Printf ("I82557 Chip Registers at% # x: / n", (int) oaddr);
For (i = 0; i <0x18; i = 4)
Printf ("% 8.8X", INL (IOADDR I));
Printf ("/ n");
Printf ("% Snterrupt Sources Are Pending./N",
(STATUS & 0xFF00)? "i": "NO I");
Printf ("The Transmit Unit State IS '% S' ./ N",
TX_State [(STATUS >> 6) & 3]);
Printf ("The Receive Unit State IS '% S' ./ N",
RX_STATE [(STATUS >> 2) & 15]);
IF (status == 0x0050)
Printf ("this status is normal for an agentid but idle"
"interface./N");
Else
Printf ("this status is unusual for an actid interface./N");
IF (IOADDR SCBCMD)! = 0) Printf ("The Command Register Has An Unprocessed Command"
"% 4.4x (?!) ./ n",
INW (IOADDR SCBCMD);
}
/ * Read the eeprom. * /
{
INT size_test = do_eeprom_cmd (IOADDR, (EE_READ_CMD << 8) << 16, 27);
EE_ADDR_LEN = (size_test & 0xffe0000) == 0xffe0000? 8: 6;
EEPROM_SIZE = 1 << EE_ADDR_LEN;
IF (debug)
Printf ("EEPROM SIZE PROBE RETURNED% # x,% d bit address./n",
SIZE_TEST, EE_ADDR_LEN);
For (i = 0; i EEPROM_CONTENTS [I] = Read_eeProm (IOADDR, I, EE_ADDR_LEN); Memcpy (new_ee_contents, eeprom_contents, eeprom_size << 1); } PHY0 = EEPROM_CONTENTS [6] & 0x8000? -1: EEPROM_CONTENTS [6] & 0x1f; PHY1 = EEPROM_CONTENTS [7] & 0x8000? -1: EEPROM_CONTENTS [7] & 0x1f; IF (Verbose> 2 || show_eeprom> 1) { Unsigned short sum = 0; INT LAST_ROW_ZEROS = 0; U16 Zeros [8] = {0, 0, 0, 0, 0, 0, 0, 0}; Printf ("EEPROM Contents, Size% DX16: / N", EEPROM_SIZE); For (i = 0; i Int J; IF (Memcmp (EEPROM_CONTENTS I, ZEROS, 16)! = 0) { Last_row_zeros = 0; Printf ("% # 4.2x:", i); For (j = 0; j <8; j ) { Printf ("% 4.4x", EEPROM_CONTENTS [I J]); SUM = EEPROM_CONTENTS [i j]; } Printf (""); For (j = 0; j <8; j ) { INT EW = EEPROM_CONTENTS [I J]; Printf ("% C% C", Isprint (ew & 0xff)? EW & 0xFF: '_', Isprint (ew >> 8)? EW >> 8: '_'); } Printf ("/ n"); } else if (! last_row_zeros) { Last_row_zeros = 1; Printf ("... / n"); } } IF (sum == 0xbaba) / * bahhhh. * / Printf ("The EEPROM CHECKSUM IS CORRECT./N"); Else Printf ("***** the eeprom checksum is incorrect! ***** / n" "THE CHECKSUM IS 0X% 2.2X, IT Should Be 0xBaba! / N", SUM); } / * The user will usually want to see the interpreted eeprom contents. * / IF (Verbose> 1 || show_eeprom) EEPRO100_EEPROM (EEPROM_CONTENTS); / * THESE TWO "-g / * Clear The Sleep Mode Bit with "-g 0". * / IF (OPT_G && OPT_GPIO == 0 && (EEPROM_CONTENTS [10] & 0x0002)) { Printf ("CHANGING THE Chip Configuration Word (Offset 10) TO% # 4.4x. / n", NEW_EE_CONTENTS [10]); NEW_EE_CONTENTS [10] = EEPROM_CONTENTS [10] & ~ 0x0002; EEPROM_CHANGE ; } IF (OPT_G && OPT_GPIO == 1 && EEPROM_CONTENTS [6] == 0) { Printf ("Changing the Transceiver Type to Mii RJ45./N"); NEW_EE_CONTENTS [5] = 0x0101; NEW_EE_CONTENTS [6] = 0x4401; EEPROM_CHANGE ; } #if! defined (enable_hwaddr_update) IF (EMERGENCY_REWRITE) FPRINTF (stderr, "full eeprom overwrite has been disabled" "in this release of the diagnostic./N"); IF (set_hwaddr) FPRINTF (stderr, "Modifying The Station (Mac) Address Has Been Disabled "in this release of the diagnostic./N"); #ELSE / * Do Not Enable this code for end-users: it is too easy to misuse. * / IF (EMERGENCY_REWRITE &&! SET_HWADDR) Printf ("*** EMERGENCY EEPROM REWRITE IS Only Valid When You ALSO" "Specify a new / n *** station address with -h IF (set_hwaddr) { IF (EMERGENCY_REWRITE) Memcpy (new_ee_contents, djb_eepro100_eeproom, sizeof djb_eepro100_eeprom); For (i = 0; i <3; i ) NEW_EE_CONTENTS [I] = (New_HWADDR [i * 2 1] << 8) new_hwaddr [i * 2]; EEPROM_CHANGE ; } #ENDIF IF (EEPROM_CHANGE) { U16 Checksum = 0; / * Recalculate the checksum. * / For (i = 0; i Checksum = new_ee_contents [i]; IF (new_ee_contents [i]! = 0xbaba - checksum) { IF (debug) Printf ("The Checksum At Location% D Must Be" "Updated from 0x% 4.4x to 0x% 4.4X. / n", i, EEPROM_CONTENTS [I], 0XBABA - Checksum; NEW_EE_CONTENTS [I] = 0xbaba - Checksum } For (i = 0; i IF (new_ee_contents [i]! = EEPROM_CONTENTS [I]) { IF (do_write_eeprom) { Printf ("Writing% # 4.4X to Configuration EEPROM WORD% D. / N", NEW_EE_CONTENTS [I], I); Write_eeprom (IOADDR, I, New_EE_CONTENTS [i], EE_ADDR_LEN; Else Printf ("Would Write% 4.4x to Replace% 4.4X at% D. / N", NEW_EE_CONTENTS [I], EEPROM_CONTENTS [I], i); } } / * Grrr, IT Turns Out the phy is not always # 0. * / IF (Verbose> 1 || Show_mii) { IF (PHY0> 0 && MDIO_READ (IOADDR, PHY0, 0)! = 0xffff &&&& MDIO_READ (IOADDR, PHY0, 0)! = 0x0000) { Printf ("Primary Transceiver IS MII PHY #% D.", PHY0); Show_mii_details (IOADDR, PHY0); } IF (PHY1> 0 && MDIO_READ (IOADDR, PHY1, 0)! = 0xffff && MDIO_READ (IOADDR, PHY1, 0)! = 0x0000) { Printf ("Alternate Transceiver IS MII PHY #% D.", PHY0); Show_mii_details (IOADDR, PHY1); } } IF (PHY0> 0 && nway_advertise> 0) { Printf ("Setting The Media Capability Advertisement Register Of" "PHY #% D to 0x% 4.4X. / N", PHY0, NWAY_ADVERTITISE | 1); MDIO_WRITE (IOADDR, PHY0, 4, NWAY_ADVERTISE | 1); } IF (show_mii> 1) {/ * monitor mii status * / Monitor_MII (IOADDR, PHY0); } / * Flash Operations. * / IF (OPT_FLASH_SHOW) Flash_PCI_ROM_SHOW (IOADDR, 0); IF (OPT_FLASH_DUMPFILE) IF (Flash_PCI_ROM_DUMP (IOADDR, 0, OPT_FLASH_DUMPFILE) <0) { FPrintf (stderr, "failed to save the old flash bootrom image" "INTO file '% s' ./ n", OPT_FLASH_DUMPFILE); Return 3; } IF (OPT_FLASH_LOADFILE) IF (Flash_PCI_ROM_PROGRAM (IOADDR, 0, OPT_FLASH_LOADFILE) <0) { FPRINTF (stderr, "failed to load the new flash bootrom image" "From file '% s' ./ n", opt_flash_loadfile; Return 4; } Return 0; } / * Reading and programing the eepro100 Flash Requires a kernel extension That Allocates a Memory Region and Mmaps The PCI Boot Rom Space. THE CURRENT (MID-2002) Code That Does This Only Works ON A FEW KERNEL Versions, and thus not enabled by default. * / INT FLASH_PCI_ROM_SHOW (Long Ioaddr, Long Data) { Printf ("Flash Operations Not Configured Into this Program"); Return -1; } INT FLASH_PCI_ROM_DUMP (Long Ioaddr, Long Data, Const Char * FileName) { Printf ("Flash Operations Not Configured Into this Program"); Return -1; } INT FLASH_PCI_ROM_PROGRAM (Long Ioaddr, Long Data, Const Char * FileName) { Printf ("Flash Operations Not Configured Into this Program"); Return -1; } / * Serial EEPROM section. A "Bit" Grungy, But We Work Our Way THROUGH bit-by-bit: ->. * / / * EEPROM_CTRL BITS. * / #define EE_SHIFT_CLK 0x01 / * EEPROM Shift Clock. * / #define EE_CS 0x02 / * EEPROM Chip Select. * / #define EE_DATA_WRITE 0X04 / * EEPROM Chip data in. * / # define ee_data_read 0x08 / * EEPROM Chip Data out. * / #define ee_ENB (0x4800 | EE_CS) #define EE_WRITE_0 0x4802 #define EE_WRITE_1 0x4806 #define EE_OFFSET Scbeeprom / * DELAY BETWEEN EEPROM Clock Transitions. * / #define EEPROM_DELAY (EE_ADDR) INW (EE_ADDR) / * Wait for the EEPROM to Finish the previous Operation. * / Static Int EEPROM_BUSY_POLL (Long Ee_ioAddr) { INT I; OUTW (EE_ENB, EE_IOADDR); For (i = 0; i <10000; i ) / * Typical 2000 Ticks * / IF (INW (EE_IOADDR) & EE_DATA_READ) Break; Return I; } Static int tent_eeprom (long oaddr, int location, int addr_len) { Return do_eeprom_cmd (IOADDR, ((EE_READ_CMD << AddR_Len) | location) << 16, 3 AddR_len 16) & 0xfff; } Static Void Write_EEPROM (Long Ioaddr, Int INDEX, INT VALUE, INT Addr_len) { Long EE_IOADDR = IOADDR EE_OFFSET; INT I; / * Poll for previous op finish. * / EEPROM_BUSY_POLL (EE_IOADDR); / * Typical 0 Ticks * / / * Enable programming model. * / Do_eeprom_cmd (IOADDR, (0x4f << (AddR_Len-4)), 3 AddR_len); / * Do the actual write. * / Do_eeprom_cmd (IOADDR, (((EE_WRITE_CMD << AddR_Len) | index) << 16) | (Value & 0xfff), 3 AddR_len 16); / * Poll for Write Finished. * / I = EEPROM_BUSY_POLL (EE_IOADDR); / * Typical 2000 Ticks * / IF (debug) Printf ("Write Finished After% D Ticks./N", I); / * Disable Programming. This Command Is Not Instantaneous, So We Check For busy before the next op. * / Do_eeprom_cmd (IOADDR, (0x40 << (AddR_Len-4)), 3 AddR_len); EEPROM_BUSY_POLL (EE_IOADDR); } / * This Executes a Generic EEPROM Command, Typically a Write or Write Enable.it Returns The Data Output from the EEPROM, AND THUS May Also Be buy Reads. * / Static Int Do_eeProm_CMD (Long Ioaddr, Int Cmd, INT CMD_LEN) { Unsigned retval = 0; Long EE_ADDR = IOADDR EE_OFFSET; IF (Debug> 1) Printf ("EEPROM OP 0x% x:", CMD); OUTW (EE_ENB | EE_SHIFT_CLK, EE_ADDR); / * Shift the command bits out. * / Do { Short dataval = (cmd & (1 << cmd_len))? EE_WRITE_1: EE_WRITE_0; OUTW (DATAVAL, EE_ADDR); EEPROM_DELAY (EE_ADDR); IF (Debug> 2) Printf ("% x", INW (EE_ADDR) & 15); OUTW (DATAVAL | EE_SHIFT_CLK, EE_ADDR); EEPROM_DELAY (EE_ADDR); RetVal = (RetVal << 1) | ((INW (EE_ADDR) & EE_DATA_READ)? 1: 0); } while (--cmd_len> = 0); OUTW (EE_ENB, EE_ADDR); / * Terminate the EEPROM Access. * / OUTW (EE_ENB & ~ EE_CS, EE_ADDR); IF (Debug> 1) Printf ("EEPROM RESULT IS 0X% 5.5X. / N", RetVal); Return RetVal; } / * Read and Write the mii registers Using the Parallel MDIO Interface ON The speedo3. this is far less exciting tour THEPICAL BIT-Serial Implementation (WHEW!) Although We cannot Control Preamble Generation. * / INT MDIO_READ (Long Ioaddr, INT PHY_ID, INT LOCATION) { INT VAL, BOGUSCNT = 64 * 10; / * <64 usec. to Complete, Typ 27 Ticks * / OUTL (0x08000000 | (Location << 16) | (PHY_ID << 21), IOADDR SCBCTRLMDI); Do { Val = INL (IOADDR Scbctrlmdi); IF (--boguscnt <0) { FPRINTF (stderr, "MDIO_READ () TIMED OUT with VAL =% 8.8X. / N", VAL); } } while (! (value); Return Val & 0xfff; } Void MDIO_WRITE (Long Ioaddr, Int PHY_ID, INT Location, Int Value) { INT VAL, BOGUSCNT = 64 * 10; / * <64 Usec. to Complete, Typ 27 Ticks * / OUTL (0x04000000 | (Location << 16) | (PHY_ID << 21) | Value, IOADDR Scbctrlmdi; Do { Val = INL (IOADDR Scbctrlmdi); IF (--boguscnt <0) { FPRINTF (stderr, "mdio_write () TIMED OUT with VAL =% 8.8X. / N", VAL); } } while (! (value); Return; } / * Simple Alternate Functions if libmii is not ready. * / Extern int monitor_mii (long oaddr, int pHY_ID) __ATTRIBUTE __ ((WEAK)); Extern int show_mii_details (long oaddr, int pHY_ID) __ATtribute __ ((weak)); Int Monitor_MII (Long Ioaddr, INT PHY_ID) { INT I; Unsigned short new_1, baseline_1 = mdio_read (IOADDR, PHY_ID, 1); IF (Baseline_1 == 0xfff) { FPrintf (stderr, "no mii transcecess to monitor./N"); Return -1; } Printf ("Baseline Value of Mii Status Register IS% 4.4X. / N", Baseline_1); For (i = 0; i <60; i ) { NEW_1 = MDIO_READ (IOADDR, PHY_ID, 1); IF (new_1! = Baseline_1) { Printf ("MII STATUS Register Changed to% 4.4x. / N", New_1); Baseline_1 = new_1; } Sleep (1); } Return 0; } INT Show_MII_Details (Long Ioaddr, INT PHY_ID) { INT mii_reg; Printf ("MII PHY #% D Transceiver Registers:", PHY_ID); For (MII_REG = 0; MII_REG <32; MII_REG ) Printf ("% s% 4.4x", (mii_reg% 8) == 0? "/ n": "", MDIO_READ (IOADDR, PHY_ID, MII_REG); Printf ("./ n"); Return 0; } / * Phy Media Interface Chips. * / Static const char * phys [] = { "NONE", "I82553-A / B", "I82553-C", "I82503", "DP83840", "80C240", "80C24", "I82555", "Unknown-8", "Unknown-9", "DP83840A", "UNKNOWN-12", "Unknown-13", "Unknown-14", "Unknown-15",}; ENUM PHY_CHIPS {nonsuchphy = 0, I82553AB, I82553C, I82503, DP83840, S80C240, S80C24, I82555, DP83840A = 10,} Static const char is_mii [] = {0, 1, 1, 0, 1, 1, 0, 1}; Const char * connectors [] = {"RJ45", "BNC", "AUI", "MII"} Static void EEPRO100_EEPROM (Unsigned Short * EEPROM) { Unsigned char dev_addr [6]; INT I, J; INT PHY0 = EEPROM [6] & 0x8000? -1: EEPROM_CONTENTS [6] & 0x1f; INT PHY1 = EEPROM [7] & 0x8000? -1: EEPROM_CONTENTS [7] & 0x1f; Printf ("Intel EthereXpress Pro 10/100 EEPROM Contents: / N" "Station address"); For (j = 0, i = 0; i <3; i ) { DEV_ADDR [J ] = EEPROM [i]; DEV_ADDR [J ] = EEPROM [I] >> 8; } For (i = 0; i <5; i ) Printf ("% 2.2x:", DEV_ADDR [I]); Printf ("% 2.2x./n", dev_addr [i]); IF ((EEPROM [3] & 0x03)! = 3) Printf ("Receiver Lock-Up bug exissrs" (The Driver Work-Around * is * " "imported.) / n"); Printf ("" Board assembly% 4.4x% 2.2x-% 3.3D, Physical Connectors present: ", EEPROM [8], EEPROM [9] >> 8, EEPROM [9] & 0xFF); For (i = 0; i <4; i ) IF (EEPROM [5] & (1 << i)) Printf (Connectors [i]); Printf ("/ n primary interface chip% s phy #% d. / n", Phys [(EEPROM [6] >> 8) & 7], PHY0); IF ((EEPROM [6] >> 8) & 0x3f) == DP83840) Printf ("Transceiver-Specific Setup Is Required for the DP83840" "Transceiver./N"); IF (EEPROM [7] & 0x0700) Printf ("Secondary Interface Chip% S, PHY% D. / N", Phys [(EEPROM [7] >> 8) & 7], PHY1); IF (EEPROM [6] == 0) Printf (no_xcvr_msg); IF (EEPROM [10] & 0x0002) PRINTF (SLEEP_MODE_MSG); Return; } / * * Local variables: * Compile-Command: "cc--al -o EEPRO100-DIAG EEPRO100-DIAG.C" * Alt-compile-command: "cc -o -wall -o eepro100-diag eepro100-diag.c -dlibmii libmi.c" * Tab-Width: 4 * C-Indent-Level: 4 * C-Basic-Offset: 4 * END: * /
