G65SC802 and G65SC816 instruction set (in alphabetical order)
HDW1978 Provided Required Date 2000-07-25 20:15:08
(Thank you very much for the second submission of HDW1978. - Compilation Studio)
-------------------------------------------------- -------------------------------
// The following instructions do not have a speech value and accumulator value (two operand command), memory or accumulator value (single operating instruction) as an operand.
ADC carrying and 'operation ASL left shift a BCC (BLT) When a BCC (BLT) is carry (PE = 0), branch BCS (BGE) is branching (PZ = 1) when branch BEQ is equally (PZ = 1) Bit bit test BMI result reduction (PN = 1) When branch BNE is ominous (PZ = 0), branch BPL results plus (PN = 0) When branch BRA is always branch BRK forced interrupt BRL always long integer branch BVC no overflow (PV = 0) When branch BVS overflow (PV = 1) When the branch CLC Clear Ground Sign CLD Clear Decimal Mode CLI Clear Interrupt Disable Bit CLV Clear Overflow Sign CMP (CPA) Compare CPX Compare Memory and X Register CPY Comparison The memory and Y register DEC will be reduced. If the accumulator can also reduce the DEY register x to decrease a DEY register y to reduce the EOR train, if the accumulator can also increase the INY register Y, INAINX register X Increase a JML long integer jump, forced long jump equal to JMLJMP Jump JSL long integer subroutine jump, long absolute addressing method can also load accumulator LDX memory values to load registers for JSRLDA memory values. XLDY Memory Value Mount Register YLSR Right Movement One MVN Reverse Block Move MVP Positive Block Mobile NOP No ORA Memory Value and Acupuncture Value Value or PEA Stack (Direct Address) PEI Pressure (Indirect Address) Per Pressing (PC Register) PHA Punch PHB Press (Data Section Register) PHD Press (Direct Register) PHP Press (Process Segment Register) PHP Stack (Processor Status Value) PHX Press (X Register) PHY Press (Y Register) PLA Form (to Accompressor) PLB Flow (To Data Segment Register) PLD Fand (To Direct Register) PLP Flow (to processor status) PLX out of the stack ( To the X Register) PLY Find (to Y Register) REP Reset State Bit Room ROL Cycle Left Shot Retur Return RTL From Interrupt Return Return (Long Integer) RTS From the subroutine Return SBC Borrow subtraction SEC Setting the Alipass Syroscope SED Settings Decan Mode SEI Settings Interrupt Disable Status SEP Settings Processor Status Bit STA Accumulator Value Deposit STP Stop Clock STX X Register Value Depository STY Y Register Value Deposits STZ Pixabay Transfer value to the X register TAY accumulator value Transfer to the Y register TCD (TAD) accumulator value Transfer to Direct Register TCS (TAS) Accumulator Value Transfer to Stack Pointer Register TDC (TDA) Direct Register Value to Accutor TRB Test And replace TSB test Try and set the bit TSC (TSA) Stack pointer register value to the accumulator TSX stack pointer register value to the X register TXA X register value to the accumulator TXS X register value to the stack pointer register TXY X register value to the Y register The TYA Y register value is sent to the accumulator TYX Y register value to the X register WAI waiting interrupt XBA (SWA) exchange accumulator high 8-bit and low 8-bit XCE exchange inlet position and analog bit
