Home Page Help Index Overview Tutorials EMU8086 Reference Download
Complete 8086 Instruction Set
Quick Reference:
AAA AAD AAM AAS ADC ADD AND CALL CBW CLC CLD CLI CMC CMP CMPSB CMPSW CWD DAA DAS DEC DIV HLT IDIV IMUL IN INC INT INTO IRET JA JAE JB JBE JC JCXZ JE JG JGE JL JLE JMP JNA JNAE JNB JNBE JNC JNE JNG JNGE JNL JNLE JNO JNP JNS JNZ JO JP JPE JPO JS JZ LAHF LDS LEA LES LODSB LODSW LOOP LOOPE LOOPNE LOOPNZ LOOPZ MOV MOVSB MOVSW MUL NEG NOP NOT OR OUT POP POPA POPF PUSH PUSHA PUSHF RCL RCR REP REPE REPNE REPNZ REPZ RET RETF ROL ROR SAHF SAL Sar sb scasb scampw shl shr stc std stosb stosw Sub test xchg xlatb xor
Operand Types: Operament Type: REG: AX, BX, CX, DX, AH, Al, BL, BH, CH, CL, DH, DL, DI, SI, BP, SP. SREG: DS, ES, SS, AND Only As Second Operand: CS. Memory: [BX], [BX Si 7], Variable, ETC ... (See Memory Access). Immediate: 5, -24, 3FH, 10001101B, ETC ...
Notes: Note:
When Two Operands Are Required for An Instruction The isy: Separates with a comma (,) in an instruction. Separate with a comma (,). As follows: REG, MEMORY WHEN THEN ARE TWO OPERANDS, BOTH OPERANDS MUST HAVE THE Same size (Except Shift and Rotate Instruction). For Example: When there are two operands in the instruction, their size must be equal (unless type conversion). As follows: Al, DL DX, AX M1 DB? Al, M1 M2 DW AX, m2 some instructions allow several operand combinations For example:?. some instructions allow merge several operands as follows:. memory, immediate REG, immediate memory, REG REG, SREG some examples contain macros, so it is advisable to use
Shift f8
hot key to Step Over (to make macro code execute at maximum speed set step delay to zero), otherwise emulator will step through each instruction of a macro Here is an example that uses PRINTN macro:. # make_COM # include 'emu8086.inc' ORG 100H MOV Al, 1 MOV BL, 2 Printn 'Hello World!'; Macro. Mov CL, 3 Printn 'Welcome!'; Macro. Retthese Marks Are Used To Show The State of The Flags: The following is some status flags: 1 - instruction sets this flag to 1. Directive setting flag is 1 0 - instruction sets this flag to 0. The value of the instruction setting flag is 0 r - flag value defends on Result of the instruction. The value of the flag is dependent on the instruction. - Flag Value is undefined (maybe 1 or 0). The value of the flag is uncertain (1 or 0)
Some instructions generate exactly the same machine code, so disassembler may have a problem decoding to your original code. This is especially important for Conditional Jump instructions (see "Program Flow Control" in Tutorials for more information).
Instructions in Alphabetical Order:
Instruction instruction
Operands operand
Description Description AAA No operands ASCII Adjust after Addition Corrects result in AH and AL after addition when working with BCD values It works according to the following Algorithm:.. If low nibble of AL> 9 or AF = 1 then:
Al = Al 6ah = AH 1AF = 1cf = 1 else
AF = 0cf = 0 in Both Case: Cairs the high Nibble of Al. EXAMPLE: MOV AX, 15; AH = 00, Al = 0FH AAA; AH = 01, Al = 05 RET
CZSOPAR ???? R Aad No Operands ASCII Adjust Before Division. Prepares Two BCD Values for Division. Algorithm:
Al = (AH * 10) Alah = 0 Example: MOV AX, 0105H; AH = 01, Al = 05 AAD; AH = 00, Al = 0FH (15) RET
? CZSOPA rr r AAM No operands ASCII Adjust after Multiplication Corrects the result of multiplication of two BCD values Algorithm: AH = AL / 10AL = remainder Example:??.. MOV AL, 15; AL = 0Fh AAM; AH = 01, AL = 05 RET
CZSOPA? RR? R? AAS No Operands ASCII Adjust After Subtraction. CORRECTS RESULT IN AH AND AL AFTER SUBTRACTION WHEN WORKING WITH BCD VALUES. Algorithm: if Low Nibble of Al> 9 OR AF = 1 THEN:
Al = Al - 6ah = ah - 1AF = 1cf = 1 else
AF = 0cf = 0 in Both Case: Cases: Cairs the High Nibble of Al. EXAMPLE: MOV AX, 02FFH; AH = 02, Al = 0FFH AAS; AH = 01, Al = 09 RET
CZSOPAR ???? r ADC
REG, MEMORY
Memory, REG
REG, REG
Memory, Immediate
REG, IMMEDIATE
Add with carry. Algorithm: operand1 = OPERAND1 OPERAND2 CF EXAMPLE: STC; SET CF = 1 MOV Al, 5; Al = 5 ADC Al, 1; Al = 7 RET
CZSOPARRRRR ADD
REG, MEMORY
Memory, REG
REG, REG
Memory, Immediate
REG, IMMEDIATE
Add. Algorithm: operand1 = OPERAND1 OPERAND2 EXAMPLE: MOV Al, 5; Al = 5 Add Al, -3; Al = 2 RET
CZSOPARRRRR AND
REG, MEMORY
Memory, REG
REG, REG
Memory, Immediate
REG, IMMEDIATE
Logical and Between All Bits of Two Operands. Result is Stored IN OPERAND1. THESE RULES APPLY: 1 and 1 = 1 1 and 0 = 0 0 and 1 = 0 0 = 0 Example: MOV Al, 'A'; Al = 01100001B and Al, 1101111B; Al = 01000001B ('a') RET
CZSOP0RR0R Call
Procedure name
label
4-byte address
Transfers control to procedure, return address is (IP) is pushed to stack 4-byte address may be entered in this form:. 1234h: 5678h, first value is a segment second value is an offset (this is a far call, so CS Is Also Pushed to Stack). EXAMPLE: # Make_com # ORG 100H; For Com File. Call P1 Add Ax, 1 Ret; Return TO OS. P1 Proc; Procedure Declaration. MOV AX, 1234H Ret; Return To Caller. P1 EndpczsoPaunchanged CBW No Operands Convert Byte Into Word. Algorithm: IF High Bit of Al = 1 THEN:
AH = 255 (0FFH) ELSE
AH = 0 EXAMPLE: MOV AX, 0; AH = 0, Al = 0 MOV Al, -5; AX = 000fbH (251) CBW; AX = 0FFFBH (-5) RET
CzsoPaunchanged Clc No Operands Clear Carry Flag. Algorithm: CF = 0
C0 CLD No Operands Clear Direction Flag. Si and Di Will Be Increment by Chain Instructions: Cmpsb, Cmpsw, Lodsb, Lodsw, Movsb, Movsw, Stosb, Stosw. Algorithm: DF = 0
D0 CLI No Operands Clear Interrupt Enable Flag. This Disables Hardware Interrupts. Algorithm: if = 0
I0 CMC No Operands Complement Carry Flag. Inverts Value of Cf. Algorithm: IF CF = 1 THEN CF = 0 if cf = 0 THEN CF = 1
Cr CMP
REG, MEMORY
Memory, REG
REG, REG
Memory, Immediate
REG, IMMEDIATE
Compare. Algorithm: Operand1 - Operand2 Result Is Not Stored Anywhere, Flags Are Set (Of, SF, ZF, AF, PF, CF) According to Result. EXAMPLE: MOV Al, 5 MOV BL, 5 CMP AL, BL; Al = 5, zf = 1 (so equal!) RET
CZSOPARRRRR CMPSB No Operands Compare Bytes:
ES: [DI] from DS: [Si].
Algorithm:
DS: [Si] - ES: [DI] Set Flags According To Result: of, SF, ZF, AF, PF, CF IF DF = 0 THEN
Si = Si 1Di = DI 1 ELSE
Si = Si - 1di = di - 1 Example: See Cmpsb.asm in Samples.czsoParrrrr Cmpsw No Operands Compare Words:
ES: [DI] from DS: [Si].
Algorithm:
DS: [Si] - ES: [DI] Set Flags According To Result: of, SF, ZF, AF, PF, CF IF DF = 0 THEN
Si = Si 2DI = DI 2 ELSE
Si = Si - 2di = di - 2 Example: See cmpsw.asm in samples.
CzsoParrrrr CWD No Operands Convert Word to Double Word. Algorithm: if Hight of AX = 1 Then:
DX = 65535 (0FFFFH) ELSE
DX = 0 EXAMPLE: MOV DX, 0; DX = 0 MOV AX, 0; AX = 0 MOV AX, -5; DX AX = 00000H: 0FFFBH CWD; DX AX = 0FFFH: 0FffBH Ret
CZSopaunchanged daa No Operands Decimal Adjust After Addition. CORRECTS The Result of Addition of Two Packed BCD VALUES. Algorithm: if Low Nibble of Al> 9 OR AF = 1 Then:
Al = Al 6AF = 1 if Al> 9fh or cf = 1 THEN:
Al = Al 60HCF = 1 EXAMPLE: MOV Al, 0FH; Al = 0FH (15) DAA; Al = 15h RET
CZSOPARRRRR DAS No Operands Decimal Adjust After Subtraction of Two Packed BCD Values. Algorithm: if Low Nibble of Al> 9 OR AF = 1 THEN:
Al = Al - 6AF = 1 IF al> 9fh or cf = 1 THEN:
Al = Al - 60HCF = 1 EXAMPLE: MOV Al, 0FFH; Al = 0FFH (-1) DAS; Al = 99H, CF = 1 RET
CZSOPARRRRRR DEC
REG
Memory
Decrement. Algorithm: Operand = OPERAND - 1 Example: MOV Al, 255; Al = 0FFH (255 OR-1) DEC Al; Al = 0FEH (254 OR-2) RET
ZsoParrrr Cf - Unchanged! Div
REG
Memory
Unsigned Divide. Algorithm:
When Operand Is A
BYTE:
Al = AX / OPERAND AH = Remainder (MODULUS)
When Operand Is A
Word:
AX = (DX) / Operand DX = Remainder (Modulus) Example: MOV AX, 203; AX = 00cBH MOV BL, 4 DIV BL; Al = 50 (32H), AH = 3 RET
CZSOPA ?????? HLT No Operands Halt The System. EXAMPLE: MOV AX, 5 HLT
CZSOPAunchanged IDIV
REG
Memory
Signed Divide. Algorithm:
When Operand Is A
BYTE:
Al = AX / OPERAND AH = Remainder (MODULUS)
When Operand Is A
Word:
AX = (DX AX) / Operand DX = Remainder (MODULUS)
EXAMPLE: MOV AX, -203; AX = 0FF35H MOV BL, 4 IDIV BL; Al = -50 (0CEH), AH = -3 (0FDH) RET
CZSOPA ?????? imul
REG
Memory
Signed Multiply. Algorithm:
When Operand Is A
BYTE:
AX = Al * Operand.
When Operand Is A
Word:
(DX AX) = ax * operand.
EXAMPLE: MOV Al, -2 MOV BL, -4 Imul BL; AX = 8 RET
CZSOPAR ?? r ?? cf = of = 0 When Result Fits INTO OPERAND OF IMUL. IN
Al, Im.byte
Al, DX
AX, Im.byte
AX, DX
Input from port INTO Al OR AX. Second operand is a port number over 505 - dx register surplend. EXAMPLE: IN AX, 4; Get Status of Traffic Lights. In Al, 7; Get Status Of Stepper-Motor.
CZSOPAunchanged Inc
REG
Memory
INCREMENT. Algorithm: Operand = Operand 1 Example: MOV Al, 4 Inc Al; Al = 5 RET
ZsoParrrr CF - Unchanged! Int
Immediate byte
Interrupt Numbered by Immediate Byte (0..255). Algorithm:
Push to Stack:
Flags registercsip
IF = 0Transfer Control to Interrupt Procedure Example: MOV AH, 0EH; Teletype. Mov Al, 'A' INT 10H; BIOS Interrupt. Ret
CZSOPAIunchanged0 INTO No OPERANDS Interrupt 4 if overflow flag is 1. Algorithm: IF of = 1 THEN INT 4 example:; -5 - 127 = -132 (not in -128..127); The Result of Sub is Wrong (124) ,; ,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
Ipcsflags register
CZSOPA
Popped
Ja
label
SHORT JUMP IF FIRST OPERAND IS ABOVE SECOND OPERAND (AS SET BY CMP INSTRUCTION). Unsigned. Algorithm:
IF (cf = 0) and (zf = 0) THEN JUMP
EXAMPLE: INCLUDE 'EMU8086.INC' # Make_com # ORG 100H MOV Al, 250 CMP Al, 5 Ja Label1 Print 'Al Is Not Above 5' JMP EXIT Label1: Print 'Al Is Above 5' EXIT: RET
CzsoPaunchanged Jae
label
SHORT JUMP if First Operand is Above or equal to second operand (as set by cmp instruction). Unsigned. Algorithm:
IF cf = 0 THEN JUMP
EXAMPLE: INCLUDE 'EMU8086.INC' # Make_com # ORG 100H MOV Al, 5 CMP Al, 5 JAE Label1 Print 'Al Is Not Above Or Equal To 5' JMP EXIT Label1: Print 'Al Is Above or Equal To 5' Exit: RET
CZSOPAunchanged JB
label
SHORT JUMP if First Operand is Below Second Operand (as set by cmp instruction). Unsigned. Algorithm:
IF cf = 1 THEN JUMP
EXAMPLE: INCLUDE 'EMU8086.INC' # Make_com # ORG 100H MOV Al, 1 CMP Al, 5 JB Label1 Print 'Al Is Not Below 5' JMP EXIT Label1: Print 'Al Is Below 5' EXIT: RET
CzsoPaunchanged Jbe
label
SHORT JUMP if First Operand is Below Or Equal To Second Operand (As Set by Cmp Instruction). Unsigned. Algorithm:
IF cf = 1 or zf = 1 THEN JUMP
Example: include 'EMU8086.INC' # Make_com # org 100h MOV Al, 5 CMP Al, 5 Jbe Label1 Print 'Al Is Not Below or Equal to 5' JMP EXIT Label1: Print 'Al Is Below or Equal To 5' Exit: RetczsoPaunchanged JC
label
Short Jump if carry flag is set to 1. Algorithm:
IF cf = 1 THEN JUMP
Example: include 'EMU8086.INC' # Make_com # ORG 100H MOV Al, 255 Add Al, 1 JC Label1 Print 'NO Carry.' JMP EXIT Label1: Print 'Has Carry.' EXIT: RET
CZSOPAunchanged JCXZ
label
Short jump if cx register is 0. Algorithm:
IF cx = 0 THEN JUMP
EXAMPLE: INCLUDE 'EMU8086.INC' # Make_com # ORG 100H MOV CX, 0 JCXZ Label1 Print 'CX IS Not Zero.' JMP EXIT Label1: Print 'CX IS ZERO.' EXIT: RET
CzsoPaunchanged Je
label
SiGNED / unsigned. Algorithm: Signed / unsigned. Algorithm:
IF zf = 1 THEN JUMP
Example: include 'emu8086.inc' # Make_com # ORG 100H MOV Al, 5 CMP Al, 5 Je Label1 Print 'al is not equal to 5.' JMP EQUAL TO 5. 'EXIT: RET
CzsoPaunchanged JG
label
Short Jump if First Operand is Greater THEN Second Operand (as set by cmp instruction). Signed. Algorithm:
IF (zf = 0) AND (sf = of) THEN JUMP
Example: include 'emu8086.inc' # Make_com # ORG 100H MOV Al, 5 CMP Al, -5 JG Label1 Print 'Al Is Not Greater -5.' JMP EXIT Label1: Print 'Al Is Greater -5.' EXIT: RET
CZSOPAunchanged JGE
label
Short Jump If First Operand is Greater OR Equal To Second Operand (As Set by Cmp Instruction). Signed. Algorithm:
IF sf = of the jump
Example: include 'EMU8086.INC' # Make_com # ORG 100H MOV Al, 2 CMP Al, -5 JGE Label1 Print 'AL <-5' JMP EXIT LABEL1: Print 'Al> = -5' EXIT: RETCZSOPAUNCHANGED JL
label
Short Jump if First Operand is Less Then Second Operand (as set by cmp instruction). Signed. Algorithm:
IF sf <> of then jump
EXAMPLE: INCLUDE 'EMU8086.INC' # Make_com # ORG 100H MOV Al, -2 CMP Al, 5 JL Label1 Print 'Al> = 5.' JMP EXIT Label1: Print 'Al <5.' EXIT: RET
CzsoPaunchanged Jle
label
SiGNed. Algorithm: SiGNed. Algorithm:
IF sf <> of or zf = 1 THEN JUMP
EXAMPLE: INCLUDE 'EMU8086.INC' # Make_com # ORG 100H MOV Al, -2 CMP Al, 5 Jle Label1 Print 'Al> 5.' JMP EXIT Label1: Print 'Al <= 5.' EXIT: RET
CZSOPAunchanged JMP
label
4-byte address
Unconditional Jump. Transfers Control to Another Part of the Program. 4-Byte Address May Be Entered In this form: 1234H: 5678H, First Value Is A Segment Second Value is an offset. Algorithm:
Always Jump
EXAMPLE: INCLUDE 'EMU8086.INC' # Make_com # ORG 100H MOV Al, 5 JMP Label1; Jump Over 2 Lines! Print 'Not Jumped!' MOV Al, 0 Label1: Print 'Got Here!' Ret
CzsoPaunchanged JNA
label
SHORT JUMP IF FIRST OPERAND IS NOT ABOVE SECOND OPERAND (AS SET BY CMP INSTRUCTION). Unsigned. Algorithm:
IF cf = 1 or zf = 1 THEN JUMP
Example: include 'EMU8086.INC' # Make_com # ORG 100H MOV Al, 2 CMP Al, 5 JNA Label1 Print 'Al Is Above 5.' JMP EXIT Label1: Print 'Al Is Not Above 5.' EXIT: RET
CzsoPaunchanged Jnae
label
SHORT JUMP IF FIRST OPERAND IS NOT ABOVE AND NOT Equal To Second Operand (as set by cmp instruction). Unsigned. Algorithm: if cf = 1 THEN JUMP
Example: include 'EMU8086.INC' # Make_com # ORG 100H MOV Al, 2 CMP Al, 5 JNAE Label1 Print 'Al> = 5.' JMP EXIT Label1: Print 'Al <5.' EXIT: RET
CZSOPAunchanged JNB
label
SHORT JUMP if First Operand is Not Below Second Operand (As Set by Cmp Instruction). Unsigned. Algorithm:
IF cf = 0 THEN JUMP
Example: include 'EMU8086.INC' # Make_com # ORG 100H MOV Al, 7 CMP Al, 5 JNB Label1 Print 'Al <5.' JMP EXIT Label1: Print 'Al> = 5.' EXIT: RET
CZSopaunchanged JNBE
label
SHORT JUMP IF FIRST OPERAND IS NOT BELOW AND NOT Equal To Second Operand (as set by cmp instruction). Unsigned. Algorithm:
IF (cf = 0) and (zf = 0) THEN JUMP
EXAMPLE: INCLUDE 'EMU8086.INC' # Make_com # ORG 100H MOV Al, 7 CMP AL, 5 JNBE Label1 Print 'AL <= 5.' JMP EXIT Label1: Print 'Al> 5.' EXIT: RET
CZSOPAunchanged JNC
label
Short Jump if Carry Flag is set to 0. Algorithm:
IF cf = 0 THEN JUMP
Example: include 'EMU8086.INC' # Make_com # ORG 100H MOV Al, 2 Add Al, 3 JNC Label1 Print 'Has Carry.' JMP EXIT Label1: Print 'No Carry.' EXIT: RET
CzsoPaunchanged JNE
label
Short Jump if First Operand (as set by cmp instruction). Signed / unsigned. Algorithm:
IF zf = 0 THEN JUMP
Example: include 'EMU8086.INC' # Make_com # ORG 100H MOV Al, 2 CMP Al, 3 JNE Label1 Print 'Al = 3.' JMP EXIT LABEL1: Print 'Al <> 3.' EXIT: RET
CzsoPaunchanged JNG
label
Short Jump if First Operand (As Set by Cmp Instruction). Signed. Algorithm: IF (ZF = 1) And (sf <> of) THEN JUMP
Example: include 'emu8086.inc' # Make_com # ORG 100H MOV Al, 2 CMP Al, 3 JNG Label1 Print 'Al> 3.' JMP EXIT LABEL1: Print 'Al <= 3.' EXIT: RET
CZSOPAunchanged JNGE
label
Short Jump if First Operand is Not Greater and NOT Equal To Second Operand (As Set by Cmp Instruction). Signed. Algorithm:
IF sf <> of then jump
Example: include 'EMU8086.INC' # Make_com # ORG 100H MOV Al, 2 CMP Al, 3 JNGE Label1 Print 'Al> = 3.' JMP EXIT Label1: Print 'Al <3.' EXIT: RET
CzsoPaunchanged JNL
label
Short Jump If First Operand Is Not Less Ten Second Operand (As Set by Cmp Instruction). Signed. Algorithm:
IF sf = of the jump
Example: include 'EMU8086.INC' # Make_com # ORG 100H MOV Al, 2 CMP Al, -3 JNL Label1 Print 'Al <-3.' JMP EXIT Label1: Print 'Al> = -3.' EXIT: RET
CzsoPaunchanged JNLe
label
Short Jump if First Operand is Not Less and not equal to second operand (as set by cmp instruction). Signed. Algorithm:
IF (sf = of) and (zf = 0) THEN JUMP
Example: include 'EMU8086.INC' # Make_com # ORG 100H MOV Al, 2 CMP Al, -3 JNLE Label1 Print 'Al <= -3.' JMP EXIT Label1: Print 'Al> -3.' EXIT: RET
CzsoPaunchanged JNO
label
Short jump if not overflow. Algorithm:
IF of = 0 THEN JUMP
EXAMPLE:; -5 - 2 = -7 (Inside -128..127); The result of sub is is correct,; so of = 0: include 'emu8086.inc' # make_com # org 100h MOV Al, -5 SUB Al , 2; Al = 0F9H (-7) JNO Label1 Print 'overflow!' JMP EXIT Label1: Print 'No overflow.' EXIT: RETCZSOPAUNCHANGED JNP
label
SHORT JUMP IF NO PARITY (ODD). Only 8 Low Bits of Result Are Cmp, Sub, Add, Test, And, OR, XOR INSTRUCTIONS. Algorithm:
IF pf = 0 THEN JUMP
EXAMPLE: INCLUDE 'EMU8086.INC' # Make_com # ORG 100H MOV Al, 00000111b; Al = 7 OR Al, 0; Just Set Flags. JNP Label1 Print 'Parity Even.' JMP EXIT Label1: Print 'Parity Odd.' Exit: RET
CZSOPAunchanged JNS
label
Short jump if not sign (if posight). Set by CMP, SUB, Add, Test, And, OR, XOR Instructions. Algorithm:
IF sf = 0 THEN JUMP
EXAMPLE: INCLUDE 'EMU8086.INC' # Make_com # ORG 100H MOV Al, 00000111b; Al = 7 OR Al, 0; Just Set Flags. JNS Label1 Print 'Signed.' JMP EXIT Label1: Print 'Not Signed.' EXIT: RET
CzsoPaunchanged JNZ
label
SHORT JUMP IF NOT ZERO (NOT Equal). Set by CMP, Sub, Add, Test, And, OR, XOR Instructions. Algorithm:
IF zf = 0 THEN JUMP
Example: include 'emu8086.inc' # Make_com # ORG 100H MOV Al, 00000111B; Al = 7 or Al, 0; Just Set Flags. JNZ Label1 Print 'Zero.' JMP EXIT Label1: Print 'NOT ZERO.' EXIT: RET
CZSOPAunchanged Jo
label
Short jump if overflow. Algorithm:
IF of = 1 THEN JUMP
Example:; -5 - 127 = -132 (not in -128..127); The Result of Sub is WRONG (124),; SO of = 1 is set: include 'EMU8086.Inc' # Make_com # org 100h MOV Al, -5 SUB Al, 127; Al = 7CH (124) JO Label1 Print 'No overflow.' JMP EXIT Label1: Print 'overflow!' EXIT: RETCZSOPAUNCHANGED JP
label
SHORT JUMP IF PARITY (EVEN). Only 8 Low Bits of Result Are Checked. Set by Cmp, Sub, Add, Test, And, OR, XOR INSTRUCTIONS. Algorithm:
IF pf = 1 THEN JUMP
EXAMPLE: INCLUDE 'EMU8086.INC' # MAKE_COM # ORG 100H MOV Al, 00000101B; Al = 5 or Al, 0; Just Set Flags. JP Label1 Print 'Parity ODD.' JMP EXIT Label1: Print 'Parity Even.' Exit: RET
CZSOPAunchanged JPE
label
SHORT JUMP IF PARITY EVEN. ONLY 8 LOW BITS OF RESULT ARE CHECKED. SET BY CMP, SUB, ADD, TEST, AND, OR, XOR INSTRUCTIONS. Algorithm:
IF pf = 1 THEN JUMP
Example: include 'emu8086.inc' # Make_com # ORG 100H MOV Al, 00000101B; Al = 5 OR Al, 0; Just Set Flags. JPE Label1 Print 'Parity ODD.' JMP EXIT Label1: Print 'Parity Even.' Exit: RET
CzsoPaunchanged JPO
label
SHORT JUMP IF PARITY ODD. ONLY 8 LOW BITS OF RESULT Are Checked. Set by CMP, SUB, Add, Test, And, OR, XOR Instructions. Algorithm:
IF pf = 0 THEN JUMP
EXAMPLE: INCLUDE 'EMU8086.INC' # Make_com # ORG 100H MOV Al, 00000111b; Al = 7 or Al, 0; Just Set Flags. JPO Label1 Print 'Parity Even.' JMP EXIT Label1: Print 'Parity ODD.' Exit: RET
CZSOPAunchanged JS
label
Short Jump if Signed (if NEGATIVE). Set by CMP, SUB, Add, Test, And, OR, XOR Instructions. Algorithm:
IF sf = 1 THEN JUMP
EXAMPLE: INCLUDE 'EMU8086.INC' # MAKE_COM # ORG 100H MOV Al, 10000000B; Al = -128 OR Al, 0; Just Set Flags. JS Label1 Print 'Not Signed.' JMP EXIT Label1: Print 'Signed.' Exit: RetczsoPaunchanged JZ
label
SHORT JUMP IF ZERO (Equal). Set by CMP, SUB, ADD, TEST, AND, OR, XOR INSTRUCTIONS. Algorithm:
IF zf = 1 THEN JUMP
Example: include 'emu8086.inc' # Make_com # ORG 100H MOV Al, 5 CMP AL, 5 JZ Label1 Print 'Al Is Not Equal to 5.' JMP Equal to 5. 'EXIT: RET
CZSOPAunchanged lahf no Operands Load Ah from 8 Low Bits of Flags Register. Algorithm:
AH = flags register
AH bit: 7 6 5 4 3 2 1 0 [SF] [ZF] [0] [AF] [0] [PF] [1] [CF] BITS 1, 3, 5 Are Reserved.
CzsoPaunchanged LDS
REG, MEMORY
Load Memory Double Word Into Word Register and DS. Algorithm:
REG = first WordDs = Second Word Example: # Make_com # ORG 100H LDS AX, M RET M DW 1234H DW 5678H End AX IS set to 1234H, DS IS set to 5678H.
CzsoPaunchanged Lea
REG, MEMORY
Load Effective Address. Algorithm:
REG = address of memory (offset) Generally this instruction is replaced by MOV when assembling when possible Example:. # Make_COM # ORG 100h LEA AX, m RET m DW 1234h END AX is set to:. 0104h LEA instruction takes 3 bytes, RET Takes 1 Byte, WE Start AT 100H, SO The Address of 'M' IS 104H.
CzsoPaunchanged Les
REG, MEMORY
Load Memory Double Word Into Word Register and es. Algorithm:
REG = first Wordes = Second Word Example: # Make_com # ORG 100H LES AX, M DET M DW 1234H DW 5678H End Ax IS set to 1234H, ES IS set to 5678h.
CZSOPAunchanged Lodsb No Operands Load Byte At DS: [Si] INTO Al. Update Si. Algorithm: Al = DS: [Si] IF DF = 0 THEN
Si = Si 1 ELSE
Si = Si - 1 Example: # Make_com # ORG 100H Lea Si, A1 MOV CX, 5 MOV AH, 0EH M: LODSB INT 10H LOOP M RET A1 DB 'H', 'E', 'L', 'L', 'o'
CZSOPAunchanged Lodsw No Operands Load Word AT DS: [Si] INTO AX. Update Si. Algorithm:
AX = DS: [Si] IF DF = 0 THEN
Si = Si 2 ELSE
Si = Si - 2 EXAMPLE: # Make_com # ORG 100H Lea Si, A1 MOV CX, 5 Rep Lodsw; Finally There Will BE 555H in Ax. Ret A1 DW 111H, 222H, 333H, 444H, 555H
CZSOPAunchanged loop
label
Decrease CX, Jump to Label IF CX Not Zero. Algorithm:
CX = CX - 1 IF CX <> 0 THEN
Jump else
No Jump, Continue Example: include 'emu8086.inc' # Make_com # ORG 100H MOV CX, 5 Label1: Printn 'loop!' loop label1 ret
CzsoPaunchanged Loope
label
Decrease CX, Jump to Label IF CX Not Zero and Equal (zf = 1). Algorithm:
CX = CX - 1 IF (CX <> 0) and (zf = 1) THEN
Jump else
No Jump, Continue Example:; Loop Until Result Fits Into al alone,; or 5 Times. The result will be over 255; on third loop (100 100 100),; so loop will exit. include 'emu8086.inc' # Make_com # ORG 100H MOV AX, 0 MOV CX, 5 Label1: PUTC '*' Add Ax, 100 CMP AH, 0 Loope Label1 Ret
CzsoPaunchanged Loopne
label
Decrease CX, Jump To Label IF CX Not Zero and NOT Equal (zf = 0). Algorithm:
CX = CX - 1 IF (CX <> 0) and (zf = 0) THEN
Jump else
NO JUMP, Continue Example:; Loop Until '7' is found,; or 5 Times. include 'EMU8086.INC' # Make_com # ORG 100H MOV Si, 0 MOV CX, 5 Label1: PUTC '*' MOV Al, V1 [ Si] Inc Si; Next Byte (Si = Si 1). CMP AL, 7 Loopne Label1 RET V1 DB 9, 8, 7, 6, 5CZSOPAunchanged LOOPNZ
label
Decrease CX, Jump to Label IF CX Not Zero and ZF = 0. Algorithm:
CX = CX - 1 IF (CX <> 0) and (zf = 0) THEN
Jump else
NO JUMP, Continue Example:; Loop Until '7' is found,; or 5 Times. include 'EMU8086.INC' # Make_com # ORG 100H MOV Si, 0 MOV CX, 5 Label1: PUTC '*' MOV Al, V1 [ Si] Inc Si; Next Byte (Si = Si 1). CMP AL, 7 Loopnz Label1 RET V1 DB 9, 8, 7, 6, 5
CzsoPaunchanged Loopz
label
Decrease CX, Jump To Label IF CX Not Zero and ZF = 1. Algorithm:
CX = CX - 1 IF (CX <> 0) and (zf = 1) THEN
Jump else
No Jump, Continue Example:; Loop Until Result Fits Into al alone,; or 5 Times. The result will be over 255; on third loop (100 100 100),; so loop will exit. include 'emu8086.inc' # Make_com # ORG 100H MOV AX, 0 MOV CX, 5 Label1: PUTC '*' Add Ax, 100 CMP AH, 0 Loopz Label1 Ret
CzsoPaunchanged MOV
REG, MEMORY
Memory, REG
REG, REG
Memory, Immediate
REG, IMMEDIATE
SREG, MEMORY
Memory, SREG
REG, SREG
SREG, REG
Copy Operand2 to Operand1. The Mov Instruction Cannot:
. Set the value of the CS and IP registers.copy value of one segment register to another segment register (should copy to general register first) .copy immediate value to segment register (should copy to general register first) Algorithm:
OPERAND1 = OPERAND2
Example: # Make_com # ORG 100H MOV AX, 0B800H; SET AX = B800H (VGA Memory). MOV DS, AX; Copy Value of Ax To DS. MOV CL, 'A'; CL = 41H (ASCII CODE). MOV Ch , 01011111b; CL = color attribute. MOV BX, 15EH; bx = position on screen. MOV [BX], CX; W. [0B800H: 015EH] = CX. Ret; returns to operation system.czsopaunchanged Movsb No Operands Copy Byte AtTe DS: [Si] To Es: [di]. Update Si and Di. Algorithm:
ES: [DI] = DS: [Si] IF DF = 0 THEN
Si = Si 1Di = DI 1 ELSE
Si = Si - 1Di = di - 1 Example: # Make_com # ORG 100H Lea Si, A1 Lea Di, A2 MOV CX, 5 Rep Movsb Ret A1 DB 1, 2, 3, 4, 5 A2 DB 5 DUP (0)
CZSOPAunchanged Movsw No Operands Copy Word At DS: [Si] To Es: [Di]. Update Si and Di. Algorithm:
ES: [DI] = DS: [Si] IF DF = 0 THEN
Si = Si 2DI = DI 2 ELSE
Si = Si - 2di = di - 2 example: # make_com # org 100h Lea Si, A1 Lea Di, A2 MOV CX, 5 Rep Movsw Ret A1 DW 1, 2, 3, 4, 5 A2 DW 5 DUP (0)
CZSOPAunchanged Mul
REG
Memory
Unsigned Multiply. Algorithm:
When Operand Is A
BYTE:
AX = Al * Operand.
When Operand Is A
Word:
(DX AX) = ax * operand.
Example: MOV Al, 200; Al = 0C8H MOV BL, 4 MUL BL; AX = 0320H (800) RET
CZSOPAR ?? r ?? cf = of = 0 When High Section of the result is zero. NEG
REG
Memory
NEGATE. MAKES OPERAND NEGATIVE (Two's Complement). Algorithm:
Invert All Bits of The Operandd 1 To Inverted Operand Example: MOV Al, 5; Al = 05H NEG AL; Al = 0FBH (-5) NEG AL; Al = 05H (5) RET
CZSOPARRRRRR NOP No Operands No Operation. Algorithm:
Do Nothing Example:; Do Nothing, 3 Times: NOP NOP NOP RET
CZSOPAunchanged Not
REG
Memory
Invert Each Bit of the Operand. Algorithm: IF Bit IS 1 Turn It To 0. If Bit IS 0 Turn It To 1. EXAMPLE: MOV Al, 00011011B NOT AL; Al = 11100100B Ret
CzsoPaunchanged OR
REG, MEMORY
Memory, REG
REG, REG
Memory, Immediate
REG, IMMEDIATE
Logical or Between All Bits of Two Operands. Result is Stored In First Operand. Thase Rules Apply: 1 OR 1 = 1 1 OR 0 = 0 OR 1 = 1 0 OR 0 = 0 Example: MOV Al, 'A'; Al = 01000001B or Al, 00100000B; Al = 01100001B ('a') RET
CZSOPA0R0R? OUT
Im.byte, al
Im.byte, AX
DX, Al
DX, AX
Output from al or ax number. If Required to access port number over 255 - dx register shouth. EXAMPLE: MOV AX, 0FFFH; Turn ON All Out 4, Ax; Traffic Lights. Mov Al , 100b; Turn on The Third OUT 7, Al; Magnet of The Stepper-Motor.
CzsoPaunchanged POP
REG
SREG
Memory
Get 16 Bit Value from the stack. Algorithm:
Operand = SS: [SP] (Top of the stack) sp = SP 2 EXAMPLE: MOV AX, 1234H PUSH AX POP DX; DX = 1234H RET
. CZSOPAunchanged POPA No operands Pop all general purpose registers DI, SI, BP, SP, BX, DX, CX, AX from the stack SP value is ignored, it is Popped but not set to SP register) Note:. This instruction works only On 80186 CPU and Later! Algorithm:
POP Dipop Sipop BPPOP XX (SP Value Ignored) POP BXPOP DXPOP CXPOP AX
CzsoPaunchanged Popf No Operands Get Flags Register from The Stack. Algorithm:
Flags = SS: [SP] (Top of the Stack) sp = SP 2
CZSOPA
Popped
Push
REG
SREG
Memory
Immediate
Store 16 Bit Value In The Stack. Note: Push Immediate Works Only On 80186 CPU and Later! Algorithm:
Sp = SP - 2ss: [SP] (Top of the stack) = Operand Example: MOV AX, 1234H Push AX Pop DX; DX = 1234h Retczsopaunchange Pusha No Operands Push All General Purpose Registers AX, CX, DX, BX, SP, BP, Si, Di In The Stack. Original Value of SP Register (Before Pusha) IS Used. Note: This Instruction Works Only On 80186 CPU AND LATER! Algorithm:
Push Axpush CXPUSH DXPUSH BXPUSH SPPUSH BPPUSH SIPUSH DI
CzsoPaunchanged Pushf No Operands Store Flags Register In The Stack. Algorithm:
SP = SP - 2ss: [SP] (Top of the Stack) = Flags
CzsoPaunchanged RCL
Memory, Immediate
REG, IMMEDIATE
Memory, Cl
REG, CL
Rotate operand1 left through Carry Flag. The number of rotates is set by operand2. When immediate is greater then 1, assembler generates several RCL xx, 1 instructions because 8086 has machine code only for this instruction (the same principle works for all other shift / Rotate Instructions. Algorithm:
SHIFT All Bits Left, The Bit That Goes Off Is Set To Cf and Previous Value of Cf Is Insert To The Right-Most Position.
EXAMPLE: STC; SET Carry (CF = 1). MOV Al, 1CH; Al = 00011100B RCL Al, 1; Al = 00111001B, CF = 0. RET
Corr of = 0 if first Operand Keeps Original Sign. RCR
Memory, Immediate
REG, IMMEDIATE
Memory, Cl
REG, CL
Rotate Operand1 Right Through Carry Flag. The number of rotates is set by operand2. Algorithm:
Shift All Bits Right, The Bit That Goes Off Is Set To Cf and Previous Value of Cf is inserted to The Left-Most Position.
EXAMPLE: STC; SET Carry (CF = 1). MOV Al, 1CH; Al = 00011100B RCR Al, 1; Al = 10001110B, CF = 0. Ret
Corr of = 0 if first Operand Keeps Original Sign. Rep
Chain Instruction
REPEAT FOLLOWING MOVSB, MOVSW, LODSB, LODSW, Stosb, Stosw instructions CX Times. Algorithm: Check_CX: IF CX <> 0 Thendo Following Chain Instructioncx = CX - 1GO Back to Check_CX Else
EXIT from rep Cycle
ZR REPE
Chain Instruction
REPEAT FOLLOWING CMPSB, CMPSW, ScaSB, Scasw ISTRUCTIONS WHILAL, MAXIMUM CX TIMES. Algorithm: Check_cx: IF CX <> 0 THEN
Do Following Chain Instructioncx = CX - 1IF ZF = 1 THEN:
Go Back to Check_CX ELSE
EXIT from REPE CYCLE ELSE
EXIT from REPE CYCLE EXAMPLE: See Cmpsb.asm in Samples.
Zr repne
Chain Instruction
REPEAT FOLLOWING CMPSB, CMPSW, SCASB, Scasw instructions while zf = 0 (Result is not equals, maximum cx Times. Algorithm: Check_cx: IF CX <> 0 THEN
Do Following Chain Instructioncx = CX - 1IF ZF = 0 THEN:
Go Back to Check_CX ELSE
EXIT from Repne Cycle Else
Exit from repne Cycle
Zr repnz
Chain Instruction
REPEAT FOLLOWING CMPSB, CMPSW, SCASB, Scasw instructions while zf = 0 (Result is not zero), Maximum CX Times. Algorithm: Check_CX: IF CX <> 0 THEN
Do Following Chain Instructioncx = CX - 1IF ZF = 0 THEN:
Go Back to Check_CX ELSE
EXIT from RepNZ Cycle Else
EXIT from repnz cycle
ZR REPZ
Chain Instruction
REPEAT FOLLOWING CMPSB, CMPSW, SCASB, Scasw instructions while zf = 1 (Result is Zero), Maximum CX Times. Algorithm: Check_Cx: IF CX <> 0 THEN
Do Following Chain Instructioncx = CX - 1IF ZF = 1 THEN:
Go Back to Check_CX ELSE
Exit from repz Cycle Else
Exit from repz Cycle
Zr Ret No Operands or Even Immediate Return From Near Procedure. Algorithm:
POP from stack:
IP if immediate operand is present:
SP = SP OPERANDEXAMPLE: # Make_com # ORG 100H; for Com File. Call P1 Add Ax, 1 Ret; Return TO OS. P1 Proc; Procedure Declaration. MOV AX, 1234H Ret; Return to Caller. P1 ENDP
CZSopaunchanged Retf No Operands or Even Immediate Return from Far Procedure. Algorithm:
POP from stack:
IPCS if immediate operand is present:
SP = SP OPERAND
CzsoPaunchanged Rol
Memory, Immediate
REG, IMMEDIATE
Memory, Cl
REG, CL
Rotate Operand1 Left. The number of rotates is set by operand2. Algorithm:
SHIFT All Bits Left, The Bit That Goes Off Is Insert To The Right-Most Position.
EXAMPLE: MOV Al, 1CH; Al = 00011100B ROL Al, 1; Al = 00111000B, CF = 0. Ret
Corr of = 0 if First Operand Keeps Original Sign. ROR
Memory, Immediate
REG, IMMEDIATE
Memory, Cl
REG, CL
Rotate Operand1 Right. The number of rotates is set by operand2. Algorithm:
Shift All Bits Right, The Bit That Goes Off Is Insert To The Left-Most Position.
EXAMPLE: MOV Al, 1CH; Al = 00011100B ROR Al, 1; Al = 00001110B, CF = 0. RET
Corr of = 0 if First Operand Keeps Original Sign. Sahf No Operands Store Ah Register INTO LOW 8 BITS OF FLAGS Register. Algorithm:
Flags register = ah
AH bit: 7 6 5 4 3 2 1 0 [SF] [ZF] [0] [AF] [0] [PF] [1] [CF] BITS 1, 3, 5 Are Reserved.
CZSOParrrrrr Sal
Memory, Immediate
REG, IMMEDIATE
Memory, Cl
REG, CL
SHIFT ARITHMETIC OPERAND1 LEFT. The number of shifts is set by operand2. Algorithm:
SHIFT All Bits Left, The Bit That Goes OFFT TO CF.ZERO BIT IS ISERTED TO CF.ZERO BIT IS INSERTED TO The Right-Most Position. EXAMPLE: MOV Al, 0E0H; Al = 11100000B Sal Al, 1; Al = 11000000B, CF = 1. RET
Corr of = 0 if First Operand Keeps Original Sign. SAR
Memory, Immediate
REG, IMMEDIATE
Memory, Cl
REG, CL
Shift Arithmetic Operand1 Right. The number of shifts is set by operand2. Algorithm:
SHIFT All Bits Right, The Bit That Bit That IS ISERTED TO CF.THE SIGN BIT THAT THAT THATED. EXAMPLE: MOV Al, 0E0H; Al = 11100000B SAR AL, 1 Al = 11110000B, CF = 0. MOV BL, 4CH; BL = 01001100B SAR BL, 1; BL = 00100110B, CF = 0. RET
Corr of = 0 if first Operand Keeps Original Sign. SBB
REG, MEMORY
Memory, REG
REG, REG
Memory, Immediate
REG, IMMEDIATE
Subtract with borrow. Algorithm: Operand1 = OPERAND1 - OPERAND2 - CF EXAMPLE: STC MOV Al, 5 SBB AL, 3; Al = 5 - 3 - 1 = 1 Ret
CZSOPARRRRR SCASB No Operands Compare Bytes:
Al from ES: [DI].
Algorithm:
ES: [DI] - Al Set Flags According To Result: of, SF, ZF, AF, PF, CF IF DF = 0 THEN
Di = DI 1 ELSE
Di = di - 1
CZSOPARRRRR SCASW No Operands Compare Words:
Ax from ES: [DI].
Algorithm:
ES: [DI] - AX Set Flags According To Result: of, SF, ZF, AF, PF, CF IF DF = 0 THEN
Di = DI 2 ELSE
Di = di - 2
CZSOPARRRRR SHL
Memory, Immediate
REG, IMMEDIATE
Memory, Cl
REG, CL
Shift Operand1 Left. The number of shifts is set by operand2. Algorithm:
SHIFT All Bits LEFT, The Bit That Goes Off Is TO CF.ZERO BIT IS ISERTED TO CF.ZERO BIT POSITION. EXAMPLE: MOV AL, 11100000B SHL Al, 1; Al = 11000000B, CF = 1. RET
Corr of = 0 if first Operand Keeps Original Sign. SHR
Memory, Immediate
REG, IMMEDIATE
Memory, Cl
REG, CL
Shift operand1 Right The number of shifts is set by operand2 Algorithm:.. Shift all bits right, the bit that goes off is set to CF.Zero bit is inserted to the left-most position Example:. MOV AL, 00000111b SHR AL, 1; Al = 00000011B, CF = 1. RET
Corr of = 0 if First Operand Keeps Original Sign. Stc No Operands Set Carry Flag. Algorithm: CF = 1
C1 Std No Operands Set Direction Flag. Si and Di Will Be Decrement by Chain Instructions: CMPSB, Cmpsw, Lodsb, Lodsw, Movsb, Movsw, Stosb, Stosw. Algorithm: DF = 1
D1 STI No Operands Set Interrupt Enable Flag. This Enables Hardware Interrupts. Algorithm: if = 1
I1 StoSb No Operands Store Byte in Al Into ES: [DI]. Update Si. Algorithm:
ES: [di] = al if DF = 0 THEN
Di = DI 1 ELSE
Di = DI - 1 Example: # Make_com # ORG 100H Lea Di, A1 MOV Al, 12H MOV CX, 5 Rep Stosb Ret A1 DB 5 DUP (0)
CZSopaunchanged Stosw No Operands Store Word In Ax Into ES: [DI]. Update Si. Algorithm:
ES: [DI] = AX if DF = 0 THEN
Di = DI 2 ELSE
Di = DI - 2 Example: # Make_com # ORG 100H Lea Di, A1 MOV AX, 1234H MOV CX, 5 Rep Stosw Ret A1 DW 5 DUP (0)
CZSOPAunchanged Sub
REG, MEMORY
Memory, REG
REG, REG
Memory, Immediate
REG, IMMEDIATE
Subtract. Algorithm: Operand1 = OPERAND1 - OPERAND2 EXAMPLE: MOV AL, 5 SUB Al, 1; Al = 4 RET
CZSOParrrrrr Test
REG, MEMORY
Memory, REG
REG, REG
Memory, Immediate
REG, IMMEDIATE
Logical and Between All Bits Of Two Operands for Flags ONLY. THESE FLAGS Are Effected: ZF, SF, PF. Result IS NOT Stored Anywhere. These Rules Apply: 1 and 1 = 1 1 and 0 = 0 0 and 1 = 0 0 0 = 0 EXAMPLE: MOV Al, 00000101B Test Al, 1; ZF = 0. Test Al, 10b; ZF = 1. Retczsop0RR0R XCHG
REG, MEMORY
Memory, REG
REG, REG
Exchange Values of Two Operands. Algorithm: Operand1 <-> Operand2 Example: MOV Al, 5 MOV AH, 2 Xchg Al, AH; Al = 2, AH = 5 XCHG Al, AH; Al = 5, AH = 2 RET
CZSopaunchanged Xlatb No Operands Translate Byte from Table. Copy Value of Memory Byte At
DS: [BX unsigned al]
To al register. Algorithm: Al = DS: [BX Unsigned Al] EXAMPLE: # Make_com # ORG 100H Lea BX, Dat Mov Al, 2 XLATB; Al = 33H RET DAT DB 11H, 22H, 33H, 44H, 55H
CzsoPaunchanged XOR
REG, MEMORY
Memory, REG
REG, REG
Memory, Immediate
REG, IMMEDIATE
Logical XOR (Exclusive OR) Between All Bits of Two Operands. Result is Stored In First Operand. Thase Rules Apply: 1 xor 1 = 0 1 xor 0 = 1 0 xor 1 = 1 0 xor 0 = 0 Example: MOV Al, 00000111B XOR Al, 00000010B; Al = 00000101B RET
CZSOPA0R0R?
Copyright © 2003 EMU8086, Inc. All Rights Reserved. Http://www.emu8086.com
Home Page Help Index Overview Tutorials EMU8086 Reference Download
