Topic: Core War RedCode Translator: Michael Zeng [Michael ZENG [Michaelz2000@21cn.com] Date: 02-5-9 15: 23 * Reprint Do not delete, thank you *
Original title: Corewar Tutorial Pt INewsgroups: rec.games.corewarFrom: DURHAM@ricevm1.rice.edu (Mark A. Durham) Subject: Intro to Redcode Part IOrganization: Rice University, Houston, TXDate: Thu, 14 Nov 1991 09:41 : 37 GMT
Redcode introduction -----------------------
I. Preface - readers Note! {Part 1} II. Tag {Part I}
III. MARS characteristics {Part 1}
IV. Address Mode {Part 2}
V. Instruction set {second part}
-------------------------------------------------- --------------------
Introduction to Redcode -----------------------
I. preface - Reader BEWARE! {Part i} II. NOTATION {part i}
Iii. Mars Peculiarities {Part I}
Iv. Address model {part ii}
V. instruction set {part II}
-------------------------------------------------- --------------------
I. Preface - readers pay attention!
The name "Core War" Arguably Can Be Claims, Thus, Any Program Corewar. (Translator: Will not translate ~) Theory, everyone wants to write Redcode on a system And know that it will run in the same way on all other systems. Oops, this is nothing to do.
I. preface - Reader BEWARE!
The name "Core War" arguably can be claimed as public domain.Thus, any program can pass itself off as an implementation of CoreWar. Ideally, one would like to write a Redcode program on one systemand know that it will run in exactly the same Manner On Every Othersystem. Alas, this is not the case.
Core War has four systems: non-ICWS systems, ICWS'86, ICWS'88, and extended systems. Non-ICWS systems typically describe the Core War described in a "Computer Recreations" in "Computer Recreations" in "Science, US". Different. ComprNational Core War Society, in 1986 and 1988, Follow the Rules established in 1986 and 1988 respectively. The expansion system generally supports the ICWS'86, ICWS'88 rules, and has a certain extension. I will Talks about common public extensions if they are available on all expansion systems (most of them) .ssade, core war systems fall ONE FOUR CATAGORIES: NON-ICWS, ICWS'86, ICWS'88, or Exteded . Non-ICWS systems are usuallya variant of Core War as described by AK Dewdney in his "ComputerRecreations" articles appearing in Scientific American. ICWS'86 andICWS'88 systems conform to the standards set out by the InternationalCore War Society in their standards of 1986 and 1988, respectively.Extended systems generally support ICWS'86, ICWS'88, and proprietaryextensions to those standards. I will discuss frequently commonextensions as if they were available on all Extended systems (whichthey most certainly are not).
I will not discuss non-ICWS systems here. If you can read this article, you can easily understand most non-ICWS systems. Although ICWS'86 and ICWS'88 are called "standards", they are all I will try to point out. Note. Note. Because almost all explanations don't reasonably, I naturally prefer "I" explanation. I will try to point out other explanations that have ambiguous place, and It clearly shows that I or other people's related explanations.
I will not describe Non-ICWS systems in this article. Most Non-ICWS systems will be easily understood if you understand the systemsdescribed in this article however. Although called "standards", ICWS'86 and ICWS'88 (to a lesser extent) both suffer from ambiguitiesand extra-standard issues which I will try to address. This is where the reader should beware. Because almost anyinterpretation of the standard (s) is as valid as any other, Inaturally prefer MY interpretation. I will try to point out OtherCommon Interpretations When Ambiguities Arise Though, and i willclearly, and Id, (mine or otherwise) As Such.you Have Been Warned! ----------------------- -----------------------------------------------
Ii. Mark
"86:" indicates the characteristics of ICWS'86. "88:" indicates ICWS'88. "X:" means an extension system. "DURHAM:" indicates that my preference is explained. "Others:" Other people explain. " Note: "Meet what I am doing and why." Comments: "means that I follow or oppose the practice. There is no colonal suffix.
Ii. Notation
"86:" will indicate an ICWS'86 feature "88:". Will indicate anICWS'88 feature "X:". Will indicate an Extended feature "Durham:".. Will indicate my biased interpretation "Other:" will indicateinterpretations adhered TO by tass. "Commentary:" IS me. "Editor:" Is Me Railing for or againstcertain Usages. Items WITHOUT COLON-SUFFIXED Prefaces Can Beconsided Universal.
Redcode consists of assembly language instructions in the following format
Redcode Consists of Assembly Language Instructions of the Form
Recode routine:; Imp; by A. K. DewDney; Imp MOV IMP, IMP 1; program you copy yourself to the front instruction End; and move through memory
(Translator Note: IMP is the shortest Core WAR warrior, only one sentence)
AN EXAMPLE RECODE Program:
IMP; by A. K. DewDney; Imp MOV IMP, IMP 1; This Program Copies Itself Ahead One End; Instruction and Moves Through Memory.
The
Operators and
The
86: Operating Number 88: Operating Number Separates X: The operand can be separated by a blank or comma. Less a comma may not be expected due to ambiguity. Note: '88 standard forced you to write When an operand is not available, receive spaces to separate two operands. I like to use spaces in the expression, so I use a comma to separate the operand, I will do this here.
The
I often use "A" to represent A-operands, "B" means B-operands (uppercase is important). Use "A" to represent A-field, "b" means B-field. So I never use " a "or" b "to make a label.
I use curly brackets to include a class of operands or instructions. So "A" is equivalent to "{A, #A, @a, X ??? a, b; this describes all possible RedCode statements. I will offten use "a" to mean any a-operand and "b" to mean anyb-operand (Capitalization is Important). I Use "a" to mean any a-field and "b" to mean any b-field. For this Reason, I Never USE "a" or "b" as an operations or instructions in curly braces. Thus "is equivalent to" {a, #a, @a, "???" rarely used because we usually discuss the characteristics of a particular operator. Convenience, I often use "X-1" (although it is unreasonable) represents the previous statement of the label "X". "M" Always an integer representing the size of the MARS memory. "???" is rarely used as most often we wish to discuss the behaviour ofa specific opcode. I will often use labels such as "x-1" (despite itsillegality) for the instruction before the instruction labelled "x", for the Logically Obvious Reason. "M" Always Stands for the INTEGERWITH The Same Value As The Mars Memory size. -------------------------------------------------- -------------------- Iii. MARS features Mars has two features that make RedCode and other assembly languages. First, MARS has no absolute address. Second, memory is loop. Since there is no absolute address, RedCode is written in relative addressing. Therefore, the address is interpreted as the displacement of the current execution instruction. Address 0 is the current execution instruction. Address -1 is the previous current execution instruction (assuming no jump or branch). Address 1 is the next execution instruction (assuming no jump Transfer or branch). Because memory is loop, each instruction has an endless number of addresses. Assume that the memory size is m, the current command is {..., -2m, -m, 0, m, 2m,. ..}. The previous instructions are {..., -1-2m, -1-m, -1, m-1, 2m-1, ...}. The next instruction is {..., 1- 2M, 1-m, 1, m 1, 2m 1, ...}. Iii. Mars Peculiarities There are two things about MARS which make Redcode different fromany other assembly language. The first of these is that there are noabsolute addresses in MARS. The second is that memory is circular. Because there are no absolute addresses, all Redcode is writtenusing relative addressing. In relative addressing, all addresses areinterpreted as offsets from the currently executing instruction.Address 0 is the currently executing instruction. Address -1 was thepreviously executed instruction (assuming no jumps or branches) .Address 1 is the next instruction to execute (again assuming No Jumpsor Branches). Because Memory Is Circular, Each Instruction Has An Infinite Numberof Addresses. Assuming A Memory Size of M, The Current InstructionHAS The Addresses {..., -2m, -M, 0, M, 2M, ... }. The previousinstruction IS {..., -1-2m, -1-m, -1, m-1, 2m-1, ...}. The nextinstruction is {..., 1-2m, 1- M, 1, m 1, 2m 1, ...}. Note: MARS runs these target code that utilizes cyclic characteristics by normalization of historical reasons through normalized fields 0 to m-1. Due to memory size In programming The stage is often unknown, and the MARS has a boot program to standardize the fields in the processing code placement and initialization task pointer. Note: RedCode program often wants to know the MARS memory size early. Sometimes it is impossible. Because the standardization field can only be expressed in an integer of 0 to m-1, we can't use M. good things? M -1. But how do we write M-1 when you don't know the memory size? Recall the above, -1 is equal to M-1. The last thing to pay attention to: -1/2 is equal to 0 (instead of m / 2 [Translator Note: Is it (M-1) / 2?]) Assembler's expression is worth -0.5, then go. Commentary: MARS systems have historically been made to operate on object code which takes advantage of this circularity by insisting that fields be normalized to positive integers between 0 and M-1, inclusive Since memory size is often not known at the time of assembly,. a loader in the MARS system (which does know the memory size) takes care of field normalization in addition to its normal operations of code placement and task pointer initialization.Commentary: Redcode programmers often want to know what the memory size of the MARS is ahead of time. This is not always possible. Since normalized fields can only represent integers between inclusive 0 and M-1, we can not represent M in a normalized field. The next best thing? M-1. But how can we write M- 1 WHEN WED? Recall from Above That -1 IS Equivalent to M-1. Final Word of Caution: -1/2 Is Assembled As 0 (NOT AS M / 2) Since The Expression Is Evaluated within Assemb Ler as -0.5 and the truncated. 86: Only load two compiled RedCode programs (soldiers) to MARS memory (magnetic core) .88: The core is initialized (full) DAT 0, 0. You can load any quantity when it is not loaded into the warrior. Warrior. Note: Almost all one-on-one, only two soldiers loaded into the battle. 86: Only two assembled-Redcode programs (warriors) are loaded into MARS memory (core) .88: Core is initialized to (filled with) DAT 0, 0 before loading any warriors Any number of warriors may be loaded into core.. Commentary: Tournaments Almost Always Pit Warrior Versus Warrior With Only Two Warriors in Core. Mars is a multi-tasking system. The warrior starts with a process, but can "split" out more tasks. When all the processes of a warrior are killed, it will lose. When only one soldier can continue to run, then It is a winner. 86: Every soldier can only have 64 processes. 88: Do not limit the number of processes -------------------------------------------------- -------------------- MARS is a multi-tasking system. Warriors start as just one task, but can "split" off additional tasks. When all of a warriors taskshave been killed, the warrior is declared dead. When there is a solewarrior still executing in core, that Warrior Is Decland The Winner.86: Tasks Are Limited to a Maximum of 64 for Each Warrior.88: The Task Limit is Not set by the standard .---------------------------------------------------------------------------------------- -------------------------------------------------- - Second part: Corewar Tutorial Pt IINewsgroups: rec.games.corewarFrom: DURHAM@ricevm1.rice.edu (Mark A. Durham) Subject: Intro to Redcode Part IIOrganization: Rice University, Houston, TXDate: Thu, 14 Nov 1991 09: 45:13 GMT IV. Address Mode The addressing mode is cleverly (sometimes not very clever) to change the role of the instruction. Just talk about it. Detail leaves the instruction set. Well number (#) indicates the operand to instant addressing mode. Instant addressing mode data Contains in the field of the current instruction. If the A-mode is instant, the data is in the A-field. If the B-mode is instant, the data is in the B-field. If there is no specification (86: or use '$' The default is direct addressing mode. Direct addressing mode points to one instruction relative to the current directive. Address 0 points to the current instruction. Direct address -1 pointing (physical) previous instructions. Direct address 1 pointing (physically Next instruction. IV. Address Modes Addressing modes subtly (sometimes not-so-subtly) alter thebehaviour of instructions. A somewhat brief description of theirgeneral properties is given here. Specifics will be left to theinstruction set section. An octothorpe (#) is used to indicate an operand with an ImmediateAddress Mode. immediate mode data is contained in the currentinstruction's field. If the A-mode is immediate, the data is in theA-field. If the B-mode is immediate, the data is in the B-field. If no mode indicator is present (86: or the US dollar sign '$' ispresent), Direct address Mode is used Direct addresses refer toinstructions relative to the current instruction address 0 refers tothe current instruction Direct address -1 refers to the (physically) previous instruction... Direct Address 1 Refers To The (Physical) Next Instruction. @ Represents indirect addressing mode. In indirect addressing mode, indirect address and direct addressing are also directed to a directive, but the target is not an indirect address pointing, but It is the address representation of the B-field representation of the instruction pointed to the indirect address. (Translator Note: Let it be chaotic, there is a bit like "pointer" in the C language. " X-2 Dat # 0, # 0; target command X-1 DAT # 0, # -1; pointer command x MOV 0, @ -1; copy itself to X-2. The commercial-at (@) is used to indicate Indirect Address Mode.In indirect addressing, the indirect address points to an instructionas in direct addressing, except the target is not the instruction towhich the indirect address points but rather the instruction pointedto by the B -field of the instruction pointed to by the indirect address.example: X-2 Dat # 0, # 0; target instruction.x-1 DAT # 0, # -1; Pointer INSTRUCTION.X MOV 0, @ -1; Copies this instruction to location x-2. Small than the number (<) representation (86: Auto -, 88: Pre-) consumes indirect addressing mode. It is the same as indirect addressing mode, but the pointer will be consumed before use. (Translator Note: It seems to be first Lower 1 and then values), for example: X-2 DAT # 0, # 0; target command x-1 dat # 0, # 0; pointer instruction. And @ @ @ mv 0, <-1; copy yourself to x-2.. clous -than (<) is used to indicate (86: Auto-, 88: Pre-). Decrement Indirect Address Mode Its behaviour is just like that ofIndirect Address Mode, except the pointer is decremented before use.Example: X-2 DAT # 0, # 0; Target InstructionX-1 Dat # 0, # 0; Pointer INSTRUCTION. Compare To @ EXAMPLE.X MOV 0, <-1; Copies this instruction to location X-2. Note: Although the indirect addressing mode looks like indirect addressing mode simple extension, it is sometimes clever-especially with DJN. One point to pay attention, its name is from the '86 standard automatic consumption Addressing Mode This is the '88 standard pre-consuming indirect addressing mode. Their differences are mentioned below, which is not important for general RedCode programmers. I suggest that people who are not interested in skip the next paragraph. Commentary: Although Decrement Indirect addressing appears to be a simple extension of Indirect addressing, it is really very tricky at times - especially when combined with DJN There are sematic differences between the '86 and '88 standards, thus the change in name from Auto. -Decrement to Pre-Decrement. These differences are discussed below. This discussion is non-essential for the average Redcode programmer. I suggesting skipping to the next section for the weak-stomached. (Translator: I don't want to translate it ~ but I still take a professionalism ~) 86: DURHAM: The instruction takes out to a command register from the memory. Require each operand, store location (to address register) and instructions Go to the numerical register). After evaluation, the instruction is executed. Operating number evaluation: If it is an instant mode, the address register is set to 0 (current command address) value register is a current instruction. If it is a direct mode, the address register is set to field Value, the value register is scheduled to be directed by the address register. If it is an indirect mode, the address register is set to the B-field of the field and the field pointing to the B-field of the field, and the numerical register is set to the address register pointing. If it is an automatic consumption mode, The address register is set to a value of the sum of the B-fields of the instruction points to the field and the field. The numerical register is placed as an instruction pointed to by the address register. The operand is evaluated (but before the instruction execution), if any one The mode is automatically consumed, the corresponding memory address will be consumed (the translator:) If the two modes are automatic consumption and the two fields point to the same pointer, the memory address will consume twice. Note: Now instruction points Different instructions with any of the operands and it in any copy of the register. 86: Others: In addition to the above, in addition to the registers. All processes are in memory. 86: Durham: instructions are fetched from memory INTO AN . instruction register each operand is evaluated, storing a location (into an address register) and an instruction (into a value register) for each operand After the operands have been evaluated, the instruction is executed Operand Evaluation:.. If the mode is immediate , The Address Register is loaded with 0 (The Current Instruction " s address) and the value register is loaded with the current instruction. If the mode is direct, the address register is loaded with the field value and the value register is loaded with the instruction pointed to by the address register. If the mode is indirect , the address register is loaded with the sum of the field value and the B-field value of the instruction pointed to by the field value and the value register is loaded with the instruction pointed to by the address register. If the mode is auto- decrement, the address register is loaded with a value one less than the sum of the field value and the B-field value of the instruction pointed to by the field value and the value register is loaded with the instruction pointed to by the address register. After The Operands Have Been Evaluated (But Before Instruction Execution), IF Either Mode Was Auto-Decrement, The Appropriate Memory Location IS Decrement. If Both Modes Were Auto-Decr ement and both fields pointed to the same pointer, that memory location is decremented twice Note that this instruction in memory then points to a different instruction than either operand and also differs from any copies of it in registers.86:. Other: As above, EXCEPT THERE ARE NO REGISTERS. Note: ICWS'86 clearly describes the use of instruction registers, but other operand addresses and numerical registers are only implicit. Ambissions and lack of clearing the work of memory and register work Description Let ICWS'86 are blamed, so that ICWS'88 is born. 88: Only, in addition to all work is completed in memory, and pre-consuming indirect addressing replaces automatic consumption dosing addresses. Predicted consumption indirect addressing Consuming memory when the operand is evaluated (the translator: pay attention to the meant to consume the memory) to reduce the value of the address) instead of the evaluation. It first evaluates the A operating number to the b operation number. Commentary: ICWS ' 86 clearly states the use of an instruction register, but the other operand address and value registers are only implied. Ambiguities and lack of strong statements delineating what takes place in memory and what takes place in registers condemned ICWS'86 to eternal confusion and gave birth to ICWS'88.88:. As above except everything is done in memory and Pre-Decrement Indirect replaces Auto-Decrement Indirect Pre-Decrement Indirect decrements memory as it is evaluating the operands rather than after It evaluates operand A before evaluating operand B.-. -------------------------------------------------- ------------------- V. Instruction set There are two functions of DAT A, B DAT (Data DATA) instruction. 1. It allows you to store data as a pointer, displacement, etc. Two, any process of executing DAT instructions will be removed from the process queue. When the soldiers are all Walk from the process queue, then it will lose. 86: DAT can only have an operand - B-operand. A-field is not defined (the example is # 0), but the b-operand is the same DAT instruction Must be the same. 88: DAT Allows two operands, but only two modes - instant and pre-consumption consumption. X: DAT can take one or two arbitrary operands. If there is only one operand, it will be considered B - A number of operands, A-operand, default # 0 Note: It is worth noting that the consumption will occur before the process moves out of the queue, because the instruction is executed after the audio is evaluated after the value is evaluated, and V. Instruction Set DAT A, B The DAT (data) instruction serves two purposes. First, it allowsyou to store data for use as pointers, offsets, etc. Second, any taskwhich executes a DAT instruction is removed from the task queue. Whenall of warrior's tasks have been removed from the queue, that warriorhas lost.86:. DAT allows only one operand - the B-operand The A-field is left undefined (the example shows # 0), but comparisons of DAT instructions with identical B-operands must yield equality.88: DAT allows two operands but only two modes - immediate and pre-decrement.X:. DAT takes one or two operands and accepts all modes If only one operand is present, that operand is considered to be the B-operand and the A-operand defaults to # 0.Commentary: It is important to note that any decrement (s) WILL occur before the task is removed from the queue since the instruction executes only after the operand evaluation. MOV A, B MOV (Mobile Move) Directive Copy a field value (if all instant mode) or the entire instruction (if not instant mode) to another location of the magnetic core (from A to B) .86: DURHAM: MOV #a, #b to rewrite himself as MOV #a, #a. Note: There is a printing error in ICWS'86, explained MOV #a, B, and people with ICWS'86, please put the first Four Pages The second column of the second line of "B-Field" is deleted. 88: Instant B-mode is not allowed. (Translator: may be translated) x: Allow instant B-mode, and B - The effect of operands is the same. (See 86: DURHAM: Top). Mov A, B THE MOV (Move) Instruction Either Copies A Field Value (if EitherMode Is Immediate) or an entire instruction (if neither mode isimmediate) To Another Location In Core (from a to b) .86: DURHAM: MOV #A, #b changes itself to mov #a, # a.commentary: There is a clear Typographical Error in Icws'86 Which Changes The Interpretation of Mov # A, B To Something Non-Sensical. for Those with a Copy of Icws'86, Delete The Term "B-Field" from the next-to-last line of the second column on page 4.88: No Immediate b-modes are allowed .X: Immediate B-Modes Are Allowed and Have The Same Effect As A B-OPERAND OF 0. (See 86: DURHAM: ABOVE). Add A, B86: Add instruction adds the value of the A-position and the value of the B-position, replaces the old content of the B-position 88: If the A-mode is the real-time mode, the ADD is the same. If the A-mode is not instant Mode, the A-fields of the A-operand point to the A-fields and B-fields of the B-operands are added to the A-fields and B-fields of the B-operand pointing. B-mode cannot be real-time mode. X: B - Mode can be real-time mode, effect and 86: the same. For example, when executing once, Add # 2, # 3 turns into add # 2, # 5. Add A, B86: The Add Instruction adds the value at the a-location To the value at the b-location, replacing the b-location's old contents.88: if The a-mode is immediate, add is interface is not immediate, both the a-field and the b -field of the instruction Pointed to by the a-operand area added to it Modes Are ALOWED AND HAVE The Same Effect AS in 86 :. EXAMPLE: Add # 2, # 3 Becomes Add # 2, # 5 WHEN EXECUTED ONCE.SUB A, B SUB (Decrease Subtract) Directive The same, different Is a minus B. SUB A, B THE SUB (Subtract) Instruction IS Interpreted As Above For Allthree Cases, Except A is Subtracted from B. JMP A, B JMP (Jump JUMP) instruction change instruction pointer is A-operand. 86: JMP can only have one operand - A-operator. B-operand as # 0.88: JMP allows two operands However, the A-mode cannot be an instant mode x: JMP allows two operands, and the A-mode can be an immediate mode. The instant A-mode operand is considered to be JMP 0, B. JMP A, B THE JMP (jump) instruction changes the instruction pointer to pointto the instruction pointed to by the A-operand.86:. JMP allows only one operand - the A-operand The B-operand is shown as # 0.88: JMP allows both operands, but the A-Mode Can not be immediate.x: Jmp Allows Both Operands and the a-mode can be immediate. An Immediate A-Mode Operand IS Treated Just Like JMP 0, B WHEN Executed. JMZ A, B JMZ (For zero jump jump if zero) instruction When the B-field of the command points to the command of the command to zero, jump to the command of the A-operand point. 88: Do not allow instant A- mode. JMZ A, B The JMZ (jump if zero) instruction jumps to the instruction pointedto by the A-operand only if the B-field of the instruction pointed toby the B-operand is zero.88: Immediate A-modes are not allowed. JMN A, B JMN (Non-zero Jump Jump If Non-Zero) Instruction When the B-Operation Points The b-fields are not zero, jump to an instruction pointed to the A-operand. 88: Do not allow instantity A-mode. JMN A, B The JMN (jump if non-zero) instruction jumps to the instructionpointed to by the A-operand only if the B-field of the instructionpointed to by the B-operand is non-zero.88: Immediate A-modes Are not spaced. DJN A, B DJN (After consumption of non-zero jump Decrement and Jump if Non-Zero) instructions consumes the B-field of the directive to the B-operator, and the instructions that do not jump to the A-operand points after consumption. .88: Instant A-mode is not allowed. DJN A, B The DJN (decrement and jump if non-zero) instruction causes theB-field of the instruction pointed to by the B-operand to bedecremented. If the decremented values is non-zero, a jump to theinstruction pointed to by the A-OPERAND IS Taken.88: Immediate A-Modes Are Not ALOWED. CMP A, B CMP (comparison, equal time Skip Compare, Skip if equal) instructions compare two fields (if all instant modes) or two complete instructions (if they are not instant mode), when both are equal Over the next instruction. Note: There is a printing error in ICWS'86, explains the CMP #a, B. People with ICWS'86, please put on page 5 of the 5th line of page 5 B -field "Delete. At the same time, the annotations of the example of page 6 (" equal "should be" not equal "vice versa). Although the label is written. 88: The instant B-mode is not allowed. CMP A, B The CMP (compare, skip if equal) instruction compares two fields (if either mode is immediate) or two entire instructions (if neithermode is immediate) and skips the next instruction if the two areequivalent.Commentary: There is a clear TYPOGRAPHICAL ERROR in ICWS'86 Which Changes The Interpretation of Cmp #a, B To Something Non-sensories. for Those with a Copy of Icws'86, Delete the Term "B-Field" from the fiffh line from the bottom of the second Column on Page 5. Also, The Comments To The Example on Page 6 Have Been Switched (Equal IS Not Equal and Vice Versa). The Labels Are Correct Though.88: Immediate B-Modes Are Not Allowed. SPL A, B SPL (Split Split) instructions are split into warriors current processes and a new process. For example: the battle of two soldiers, 1 and 2, the warrior 1 has two processes (1 and 1 ') Warrior 2 only one process, It looks like this: 1, 2, 1 ', 2, 1, 2, 1, 2, etc ..86: SPL only allows an operand - b-operand. A-operand is seen as # 0 . After executing the SPL, the next execution is a new process (the new process is placed in front of the process queue). Each soldier can have up to 64 processes. 88: SPL split A-operands, not b- Operation. After executing the SPL, the next execution is the process that will not be executed when there is no new process (the new process is placed behind the process queue) does not clear the number of processes. Do not allow instant mode A-operation Number .x: Allow instant mode A-operands, like SPL 0, B effect. SPL A, B THE SPL (Split) Instruction Splits The Execution Between THISWARRIOR'S CURRENTLY RUNNING TASKS AND A New Task. EXAMPLE: A BattlebetWeen Two Warriors, 1 and 2, Where Warrior 1 Has Two Tasks (1 and1 ') And Warrior 2 Has Only One Task Would Would Look Like this: 1, 2, 1', 2, 1, 2, 1 ', 2, ETC.86 :.. SPL allows only one operand - the B-operand The A-operand is shown as # 0 After executing the SPL, the next instruction to execute for this warrior is that of the newly added task (the new task is placed at the Front of the task queue). A Maximum of 64 Tasks IS Allowed for Each Warrior.88: SPL SPLI ts the A-operand, not the B-operand. After executing the SPL, the next instruction to execute for this warrior is the same instruction which would have executed had another task not been added (the new task is placed at the back of the There is no expeneue). There is no expenes. immediate a-operands aremed.x: Immediate A-Operands Areade and Behave AS SPL 0, B WHEN Executed.88: SLT A, B: SLT (if less than Skip the Skip if Less Than) instruction If A is less than b, skip the next instruction. Do not allow instant B-mode. X: Allow instant B-mode. X: XCH A, B: XCH (Exchange) instructions exchange A-fields and B-fields of the A-operand pointing X: PCT A, B: PCT (Protect Protect) instructions protects the A-operand points until the protection is removed when an instruction is attempting to overwrite the protected instruction. 88: SLT A, B: The Slt (Skip if Less Than) Instruction Skips The Next Instruction IF a is Less Than B. No Immediate B-MODES Are Allowed.x: Immediate B-MODES Are ALLOWED.X: XCH A, B ........................ .. X: PCT A, B: The PCT (Protect) Instruction Protects The Instruction Pointed to by The A-Operand Until The Protection is Removed by An Instruction Attempting To Copy Over The Protected Instruction. Pseudo-Directive: Assembler Directive --------------------------------------- pseudo-ops : Instructions to the assembler ----------------------------------------- END END directive indicates the end 86: End without an operand 88: If the end with the label, first perform the instructions at the tag of the End Belt. (Translator: Init) x: Org A The starting point origin replaces the function of the END initial instruction. Note: If the initial instruction is not specified, the first instruction of the program is the initial instruction. Simply "end start" or "ORG Start only with" JMP Start " "The same effect. END The END pseudo-op indicates the end of the Redcode source program.86: END takes no operands.88: If END is followed by a label, the first instruction to be executed is that with the label following END.X: ORG A (origin) takes over this initial instruction function from END.Commentary:. If no initial instruction is identified, the first instruction of your program will be the initial instruction You can accomplish the same effect as "END start" or "ORG start" by MRELY Starting your program with the instruction "jmp start". 86: Space A, B: Space directives make the RedCode source list becomes beautiful. Space a, b means jumps A line, keep B lines on the next page. Some assemblers do not support space, but look at it Comment. 88: Label EQU A: EQU (equal to equals) The directive is similar to the macro, which instead of all the label "label" appeared later with a string "a". Normal label is a reference. For example: X DAT # 0, #x; here x uses X 1 DAT # 0, #x in the B-field; the B-field of each instruction gives X 2 Dat # 0, #x; relative x displacement. Equivalent to X Dat # 0, # 0; Displacement is 0x 1 DAT # 0, # -1; 1x 2 Dat # 0, # -2; 2 but x! EQU 0; action is like #define x! 0 dat # 0, #x!; in the extended system, the tag is DAT # 0, #x!; you can use an exclamation mark. Dat # 0, #x!; I dedicated They; to express instant equation. Equivalent to DAT # 0, # 0; write text DAT # 0, # 0; in each line seems to be DAT # 0, # 0; all the same -------------------------------------------------- -------------------- [Full text] 86: Space a, b: The space pseudo-op Helps Pretty-Up Redcode Source Listings. Space A, B Means To Skip A Lines, THEN Keep B Lines on the next page. Some assemblers do not support space, But Will Treat IT AS A Comment. 88: label EQU A: The EQU (equate) pseudo-op gives the programmer a macro-like facility by replacing every subsequent occurrence of the label "label" with the string "A" .Commentary: A normal label is a relative thing. EXAMPLE: x Dat # 0, #x; here x is buy in the b-fieldx 1 dat # 0, #x; Each Instruction's B-Field GivesX 2 Dat # 0, #x; The Offset To x. Is the Same as X Dat # 0, # 0; Offset of Zerox 1 Dat # 0, # -1; Onex 2 Dat # 0, # -2; Two BUT X! Equ 0; Equate Label Like #define X! 0 Dat # 0, #X!; Exclamation Points Can Be Used Dat # 0, #x!; in Labels (in Extended Systems) Dat # 0, #x!; i Use the theme exclusively to indeicate; immediate equate labels. Is the Same as Dat # 0, # 0; a Direct text Replacement Dat # 0, # 0; APPEARS THE SAME ON EVERY DAT # 0, # 0; line it is used. --------------- -------------------------------------------------- -----
