Programming in protection <1>
This article describes how to program in protection mode. Although this technology is difficult to use in the current environment, if you want to write an operating system, it is still familiar. Because memory management is the foundation of the operating system.
Programming in protection, I am also learning, counted a new person. Write this overhead is to discuss the experience of programming in the protection mode. If there is anything, please refer to it. Thank you
Protecting the protection mode from the 386 series, which provides hard gas support for supporting multitasking, can quickly perform task switching and protection task environments. It is a great inventor. Oh, in the protection mode, provide protection for different tasks And the same task is protected from different sections. I imagine that I have a big memory, and the code and data in the program are segmented, so each segment should have the start address and segment boundary limit of the segment., Each Section should have its own properties. This computer can control those sections that can access those segments, those that cannot be accessed. So each segment should have segment start address segmental segment properties. Each task has many different segments Some tasks have a common data segment or code segment. In order to save memory space. You need to share a common code segment or data segment. Make multiple tasks to access shared data .. This requires the system to determine those sections are shared. So the paragraph is private. So each section is a privilege level, I386 is divided into four levels, 0 1 2 3, the most commonly used 0 level, he represents kernel mode, 3 represents user mode .1 and 2 is usually not available.
Because you can run multiple tasks at the same time, each task has many segments, which gives your computer to the operation of the access segment, also adversely adversely the paging mechanism. Therefore, use a local description table (LDT) to describe one Tasks, a partial descriptor table, a descriptor with many segments, a descriptor of the so-called segment: is a space accounted for 8 bytes, and he is used to store the start address, segment boundary and segment properties of a store. My door can imagine that there is a table called LDT, he has many descriptors enough, each descriptor points to his corresponding segment. One LDT can constitute a segment. Each system also has a global descriptor table (GDT), which is constituted by a descriptor with a shared section and a descriptor pointing to the local descriptor. (There is an interrupt descriptor, not here Introduction to this way, I can abstract all paragraphs in memory, expressed as a few tables. As shown in the figure
We have already used the memory in memory to abstall, how can we find the paragraph I want from the table, this is to help the child to help, he is 16, two It is used to indicate the privilege level, and the third bit is used to determine whether it is from GDT, or from the LDT to find what we need, we use TI to represent this, Ti = 0 Indicates a read description from the global description table GDT The inquiry; Ti = 1 indicates that the descriptor is read from the local description table LDT. The high 13 bits of the segment selector is the descriptor index. The so-called descriptor index refers to the sequence number in the descriptor table. So my gate Segment selection is to find the segment we want. Is it a bit identical to the book? Ha ha.
People who have learned compilation know that there is a number of segment registers in the CPU, and each segment register has a high-speed buffer, but when we use the selection sub-register, the system automatically will correspond to the corresponding segment descriptor Store the high speed buffer.
The system then accesses the corresponding segment according to the information of the descriptor. This is different in the real mode, in the real mode, the segment register is the address of the segment, and in the protection mode, the segment register is installed in the segment. Selecton.
System address register:
The system address register includes: global descriptor table register GDTR, partial descriptor table register LDTR, interrupt descriptor table register IDTR, task status segment register TR., The two are not introduced here. The global description table constitutes a segment, We describe him with a pseudo descriptor. He was installed in GDTR, and I used a structure to describe him as follows.
PDESC STRUC
Limit DW 0
Base DD 0
PDESC ENDS
'Local Descriptor Table Register LDTR specifies the local descriptor table LDT used by the current task. LDTR is similar to a segment register, consisting of a 16-bit register and programmer visible to programmers. During the initialization or task switching process, the selection of the descriptor corresponding to the task LDT is loaded into the LDTR, and the processor removes the corresponding descriptor from the GDT according to the selection of the LDTR visible portion, and puts the LDT base Information such as address, boundaries, and attributes save to the invisible cache registers of LDTR. Subsequent access to the LDT, the legality check can be performed according to the relevant information stored in the high speed buffer register. The LDTR register contains the selection of the LDT of the current task. Therefore, the selection loaded to the LDTR must determine a system segment descriptor in the GDT of the LDT, i.e., the TI bit in the selection must be 0, and the type represented by the type field in the descriptor must be LDT '(edited by Yang Jiwen << 80x86 assembly language programming materials >> (to be continued ...)
