It is mainly introduced that the system address register and control register and the switching 80386 processor in the protection mode and the switching 80386 processor in the program is added to the Protection Mode, and a set of system address registers GDTR, LDTR, IDTR, TR, all of them are 32-bit. CR0 contains control bits to specify the processor mode of operation, the unused reserved CRl, CR3 and CR2 is used by the paging supervisor member, CR0 5 to 30 and 0 to 11 must be 0 in CR3, were introduced as follows: ___________________________________________________________________________ | Pg | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | ET | TS | EM | MP | PE | CR0 | __ | __ | __ | __ | __ | __ | __ | __ | __ | __ | __ | __ | __ | __ | __ | __ | __ | __ | __ | | Reserved | CR1 | __________________________________________________________________________ | | page fault linear address | CR2 | __________________________________________________________________________ | | starting physical address of the page table of 20 high | low as 12 0 | CR3 | _____________________________________________________ | ____________________ |
The PE tag is used to specify the working mode of the processor. PE = 0, the processor is in real mode; PE = 1, the processor is in the protected mode PG tag for specifying whether the processor enables the paging management mechanism. PG = 0, disable the paging management mechanism, at which time the linear address generated by the segment management components is the physical address. Pg = 1, enable the paging management mechanism, at which time the linear address generated by the segment management components must be subjected to the final physical address. MP, EM, TS, and ET are used to control the operation of the floating point coprocessor. CR2 and CR3 control registers are used by paging management mechanisms. CR2 reports an error message when the page abnormality is generated. When a page failure occurs, the processor saves the current linear address in CR2. CR3 is used to save the starting physical address in the memory, since the page table is aligned, so only 20 bits are valid, and the low 12 bits must be 0. Global Descriptor Table GDT, local descriptor table LDT and interrupt descriptor table IDT is special segment in protection mode, that is, the processor will process these linear forms as a special segment, which contains block mechanisms. Important data used. In order to be able to carry these segments more quickly, the 386 processor uses a special register to save the base address and boundaries of this segment. This register is the system address storage. The system address register under 80386 has: Global Description Table Register GDTR, partial descriptor table register LDTR, interrupt descriptor table IDTR, task status segment register TR. Global Description Form Register GDTR, with a length of 48 bits, where the height 32 bits are the base address, the lower 16-bit boundary. Since the GDT itself cannot be described by a descriptor within the GDT, the processing is provided with a special segment using the GDTR register for GDT, ie,: | | | | ________________ | global descriptor table register GDTR | | ______________________________________________________________________________________________________ GDT | _______________________ | 32-bit base | 16 limit | | | | | | ____________________________________________________________ | | | | | | | | There can be 8192 descriptors, and each descriptor is 8 bytes. At the 80386 processor, the global description table is used as a special system segment, and the boundaries of the segment are actually 8192 * 8, so the boundaries of the segment can be used in 16 bits. Normally, if the GDT has N descriptors, then the segment limit of the GDT is N * 8-1. This pseudo descriptor is also the global descriptor register content can be defined by the end: PREDESC STRUCT BASE32 DD 0 LIMIT16 DW 0 The PREDESC ENDS Local Description Table Register LDTR specifies the local description table LDT, LDTR is similar to a segment, which is 32 bits, a 16-bit register and a cache that is invisible to programmers. . The local descriptor table for each task is described as a special system segment, which is described by the descriptor defined in the global descriptor table GDT. A task has been mentioned in the front. It can only have a global descriptor table GDT and one. Interrupt Descriptive Table IDT, but there can be multiple local descriptive rows LDT, and each local descriptor table is determined by the descriptor defined in the GDT.
The selection of the LDT will generally be loaded into the LDTR, and the LDTR takes out the corresponding descriptor from the global descriptor table, and saves the base address of the LDT to a cache that is invisible to the programmer. Then you can access the LDT. All segments in the current task are described by the descriptor in the GDT. _________ ____________________________________________________ | | ______ | | | | | LDTR | ______ | 32 bit base address | 32 bit boundary | 12 Properties To | | _______ | | ___________________ | _____________________ | _________ | interrupt descriptor table and a global descriptor tables, a length 48 bits. 32-bit segment base and 16-bit boundaries. How to switch from the formal mode to the protection mode? Generally speaking, two steps: 1. Operate switch to preparations in the protection mode; 2. Switch to the protection mode. The main preparation is to establish a global descriptor table and make GDTR points to GDT, because switching to protection mode, at least load the segment of the code segment into the CS, see the program segment:
Define the structure of the descriptor Descriptor Struct Limit DW 0; segment boundary Basel DW 0; segment base address low 16-bit basem DB 0; 16 to 23 Attributes DW 0 of the section base; segment attribute Baseh DB 0; High 8-bit, 24 ~ 31Descriptor Ends; define a good descriptor PDESC STRUCT LIMIT DW 0 BASE DD 0PDESC ENDS; usually define a macro of a jump between a section, so that you can guarantee the code segment when entering the protection mode The selection is loaded into the CS register JUMP MACRO SELECTOR, OFFSET DB 0EAH DW OffsetV; segment offset DW selector; segment select sub-endm; open the A20 address line Push Axin Al, 92hor Al, 2OUT 92H, Alpop Ax; turn off the A20 address line Push Axin Al, 92HAND AL, 0FDHOUT 92H, Alpop AX; Switch to Protection mode, the 0th position in CR0 registration 1MOV EAX, CR0OR CR0, 1MOV CR0, and EAX other parts should be written according to the specific application, below The example is how to access the content of the 820000H unit in the protection mode, see the program: .386pdata segment use16gdt label byte; Define the global descriptor table Dummy Descriptor <>; empty descriptor, it has a specific definition, an air descriptor Ensure that the first descriptor in GDT will never be accessed from the descriptor code_sel = Code-GDT of the code section; the code segment descriptor is selected by the code segment descriptor <0fffh, 0h, 82H, Dattr,>; Source Data Section Descriptor, Name 820000HDataS_sel = DataS-GDT; Source Data Section Selecton GDTLEN = $ - GDTVGDTR Descriptor
