Although the 80386 processor is much more enhanced than the previous processor, these functions can only be able to get all in the protection mode. In fact, the maximum addressing space is only 1m, but the maximum addressing space of the protection mode can reach 4g, and all physical memory can be accessed. At the same time, the address space available in the program design is 64TB due to the introduction of virtual memory. The 80386 processor uses an expandable segmentation management and an optional paging management mechanism, which is implemented by the MMU (Memory Management Unit) component. Therefore, if real mode programming is performed under 80386, the 80386 processor is equivalent to the 8086 processor that is more powerful and running speed. 80386 Provides support for virtual memory, the theoretical foundation of virtual memory is: the speed of very fast memory and massive outer memory, so it is a hardware and software combination technology, which provides much storage space than physical memory . The segments under 80386 have three properties: segment base, segmental limit, segment property, usually described in Segment Descriptor, and descriptor is usually placed in a linear table, such a linear table To: GLobal Descriptor Table, LDT (Interrupt Descriptor Table), which typically uses one of the three linear tables in the above three linear tables to determine which descriptor in the three linear tables is used in something called the selector. The address space used in the program is virtual address space, which has already said that the virtual address space in 80386 can reach 64TB (later why it can reach 64TB), and the virtual address space consists of one selector and segment. This is because The selection of the segment we can obtain the descriptor of this segment, and in the descriptor, the descriptor will also explain the base of the segment, the properties of the segment, and the offset of the segment can be obtained, and the virtual address space can be obtained. However, please note that the segment base address is not plugged in 16, which is one of the differences between the protection mode and the formula mode. Obviously, any data must be loaded into physical memory to be processed, so the two-dimensional virtual address space must be converted to a one-dimensional physical address. At the same time, since each task has its own virtual address space, in order to prevent multiple parallel tasks from mapping the virtual address space to isolate the virtual address and physical address, linear address space consists of one dimensional linear address. , Linear address space and physical address spatial peer, linear address is 32 bits, addressable space is 4GB (physical address space can also reach 4GB, address site is 32 bits, so linear address space and physical address space peer peer ).
Below is the conversion of 80386 virtual address space and physical access space: | ------------ | | ---------- | ------------------ | | Virtual Address | ------> | Segment Management Components | ---> | Linear Address | --- | ---> | Optional Paging Management ... --- | -> | Physical Address | | ---- | ----- | | ---------- | | ----------------------------------------------------------- - | | ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------ - | | | ---------- | | --------- | | Select Sub | | Segment Offset | | ---------- | ------- |
During address mapping, the virtual address space is converted into a linear address by segmentation management components, which is inevitable. If the paging management mechanism is enabled in the program, the linear address is also handled by the paging management component to obtain the last physical address. If the page management mechanism is not used, the resulting linear address is the physical address. The main working mechanism of the paging management component is to divide the linear address and physical address into a size of the same size, and the correspondence is established by building a page table between the two. The segmentation management mechanism uses a variable-variable memory block to use the segmentation management mechanism to suit the logical segmentation of complex systems. The paging management mechanism uses a fixed size block, so it is suitable for managing physical storage, and the paging management mechanism can use virtual address space more efficiently. 80386 supports multitasking, so protection for each task is very necessary, the protection of tasks can be divided into: Protection in the same task, protection between different tasks. a. Protection within the same task, define four privilege levels within the same task, assign these privilege levels to the code and data in the segment, assign the highest privilege level to the most important data and the most The trusted code will give lower level privileges to general code and unimportant data. The privilege level is represented by 0 to 3, indicating the highest privilege level with the number 0, indicating the minimum privilege level with the number 3, not using the privilege level, but use the outer or inner layer to compare, very privileged The level is 0 indicates the prosthetic layer, and the special level is 3 indicates the outermost layer. Any memory segment (program segment and data segment directly accessible) has a privileged level. When a program is trying to access this storage, the privilege level is compared, if it is less than or equal (if it is equal to the same level, It is shown that it is shown that the stored segment can be accessed in the privilege level of the memory. The privileged level of the task is called the CPL (Current Previlege Level), see a simple structure: | --------- | ------- | | Codea | DataA | privilege level 0 | --------- | ------- | | --------- | ------- | | Codeb | DATAB | Privilege Level 1 | --------- | ------- | | --------- | ------- | | CODEC | DATAC | Privilege Level 2 | ------ | ------- | | --------- | ------- | | CODED | DATAD | Privilege Level 3 | ------ --- | ------- |
