Chapter 4. External Bus External Bus provides external equipment addressing and can perform code reading of 51MX devices, data read and write operations. The external bus uses the same classic 80C51 multiplexed bus and allows to increase the output address of 23 bits. 4.1 Multiple External Bus 51mx External Bus Supports 8-bit data transmission and supports 23-bit address port. It is necessary to configure the effective number of the corresponding port lines by setting the EAM bit of the MXCON register. The default is the 16-bit address bus, which can be compatible with the existing 80C51 Socket. Software Change Bus Configuration Information is reached by setting the EAM bit = 1 in the MXCON register. Typical is not recommended to change port address configuration in program execution. (, Such as: Change EAM = 1 to 0 will change the bus interface, the chip will not access the external space); when the P2 port is 23 bits (EAM = 1), high address (address16 ~ address23) and The low address (address0 ~ address7) will lock through the latch ALE to the fixed external space, when the intermediate address (address8 ~ address15) arrives, the ALE reduction does not latise, and the three byte addresses synthesize the total address. If the EAM bit of the MXCON register is not 1, then work as 80C51. There are two special P2 portions for external spatial addressing methods (EAM = 1, MXCON), MOVX @RI and MOVX @dptr, and no 23-bit address all resources are available, when using program storage address MOVC When any lack of address bits are filled by the PC, it is forced to fill 0 to reach 23 bits for all missing address bits of MOVX, so these instructions are low storage space for XDATA, so the MOVX @RI address is 8 bits high. All zero, the middle 8 bits fill it into a 23-bit address value of the RI content to zero lower 8 bits. MOVX @dptr: Address consists of 23-bit address values by the contents of the full 8-bit lower 16-bit DPTR. The state of the MOVX described in this paragraph is valid under the setting of EAM = 1. Only in this manner will only be 23 bits of 23 bits in this manner, it is still the 16-bit addressing method of 80C51. If the user has special needs to use the 23-bit address interface and the external code, you can use the software settings. If this method: Execute some code to configure the modification EAM = 1 The instruction must be a fixed setting or address <00FBH. Because when configuring the 23-bit address transition, it is necessary to prevent the external bus from providing a 16-bit address. If the PC counter jump address is 0100 when EAM = 0 (external hardware is expected or a 23-bit address), the address that provides the given address will become an error. So the flag bit setting is set in the case where the intermediate address is 0, so that no matter whether the 16-bit or 23 bit is the same. Now I plan to use 51mx 23-bit wide address and 80C51 interface. The application of the same space memory map has been developed. We must follow some programming rules, 51mx external memory access interface needs to set EAM flags 1, if you use P2 port And RW, RD control lines are launched, so that no change is required compared to 51, only low 16-bit addresses on the current 23-bit address bus are used. The memory map device triggers the ALE controller to lock the 16-bit address using the falling edge, and the MOVX @ ri / dptr command cannot use the low 8-bit address of the P0 when the EMOV @PRI; the ALE falling edge is 8-bit addresses. The correct expected memory mapping device address is valid. When P2's address8 ~ address15 address is valid, the WR / RD is executed in the falling edge. The MOVX @ Ri / DPTR instruction will result in a high bit change 0, which will cause the device to access the problem, in order to avoid this Question EMOV @PRI is used, with PR0: R3 = R2, PR1: R7 = R5, the P2 port output is both the ALE falling edge and the falling edge of the RD / WR. The final memory mapper will find the correct address.
