I haven't had a holiday in this hour of the past!
EDK 6.3i finally received Generate Libraries, the original problem has been hidden behind a nausea: EDK 6.3i does not support a file name with spaces! I have harmed the documentation about Software Specifiction. I have seen it over again. I saw it again, even the demonstration video of the dead Demos On Demand saw three times!
Anyway, the previous preparation for Platform Studio should be similar, and the rest is further studied in the back design study. Summarize the experience:
1. EDK use process (1) generate netlist; (2) s / w settings ...; eg changing the baseaddress aciding to the sdram specified in mhs file. (3) Generate BitStream; this is buy to initialize the bram of there FPGA. (4) SET Compiler Options in The Application Tab; (5) Add Project / Source File / Linkscript; (6) Generate Library; (7) Build User Applications; (8) Download; (9) DEBUG; (10) Otars.
2. E Wen is very important! If the problem is solved, it seems that there is an invisibility in the Xilinx document to mention the Platform Studio does not support the name of the file, but I will forget it at the time, I have no mental impression that my mother tongue gives people.
3. Pay attention to the log (.log) file during use, including, especially Platgen.log and Libgen.log. It is because I will notice the Error prompt in these files, and I understand a lot of problems.
4. Design Rule Check (DRC) is a threshold. If the TCL script detects that does not conform to DCR, it will not be your generate library. These error or Warning are recorded in libgen.log.
