Liang said: 8086 The most headache problem is that the segment structure, 1MB memory is limited by its segment offset. So far I don't understand what Intel is to design such a complex memory mechanism, perhaps it is necessary to compatibility with 8080. This clumsy system continues until IA64.
The following text refers to the Linux kernel source code scenario analysis.
When we say a CPU is "16-bit" or "32" bit, it refers to the width of the "arithmetic logic unit" [ALU] in the processor. The data line portion in the system bus is called a data bus, which is usually the same width as Alu. In addition, there is an address bus to access memory, and its width should be consistent with the data bus, because an address is a pointer from the perspective of programming, it is best to consistent with the width of an integer processed by the CPU. But the actual situation is impossible. 8-bit CPU If the address bus is also 8, that can only add 256 different address units, too small. So the 8-bit CPU's address bus is usually 16 bits, but in this way, some 16-bit operations are often present in the 8-bit instruction system. Later, the CPU has developed to 16 digits. The width of the original address bus and data bus should be consistent, but at that time, people think that the 16-bit address bus can address the space or too small, and increase. How big is that? Intel combines the application prospects of the microcomputer that people can see at the time and the price of the memory chip, decided to use 1MB. It can be seen that the address bus of the CPU is not what you think, how many bits are used, it is necessary to measure how many address bus to be determined at the time, if people are not universally, if people are not universal than the general feeling 1MB memory is enough If you use it, then the CPU has developed to us today. It may not now, and the 32-bit address bus will appear in 8086. In this way, 8086 decides to use 1MB of memory, then the address bus must be 20-bit width, but the CPU's ALU has only 16 bits, which means that the address pointer to the calculated address when the memory addressing is only possible. 16-bit. How to solve this problem, this should be a problem that INTEL's designer who is in the case, if it is done like an 8-bit computer, add some 20-bit instructions in the CPU instruction to make memory addressing, which will cause the CPU. The unevenness of the internal structure (I want to know if I want to know, the circuit system inside the CPU has to deal with 16-bit instructions, and handle 20 instructions, trouble is not trouble?). The Intel designer later selected the segmentation mechanism, which seems to be very clever way at the time. At that time, the PDP-II mini machine was also 16 bits, but it could map 16-bit addresses to 24-bit address space through a memory management mechanism. Intel should borrow its idea.
