First, the data transfer command;
Second, the arithmetic directive;
Third, logic instructions;
Fourth, string processing instructions;
V. Control the transfer command;
6. Processor control instructions.
(For details, see full text)
First, Data Transfer Instruction 1. Universal Data Transfer Instruction MOV (Move) Transfer PUSH (Push ONTO THE STACK) Find out of the stack XCHG (Exchange) Exchange. The MOV instruction format is: MOV DST, SRC execution Operation: (DST) <- (src) .push Infit Instruction Format is: PUSH SRC Performing: (SP) <- (SP) -2 ((SP) 1, (SP)) <- (SRC ) .POP out of the stack instruction format: Operation of POP DST: (DST) <- (SP 1), (SP)) (SP) <- (sp) 2.xchg swap instruction format: xchg OPR1 OPR2 Performance: (OPR1) <-> (OPR2) 2. Accumulator Special Transfer Instruction In (Input) Enter OUT (OUTPUT) Output XLAT (Translate) This set of instructions is limited to using accumulator AX or Al Transfer information .. Input instruction long format is: in Al, Port (byte) IN AX, Port (word) Performed: (AL) <- (port) (byte) (AX) <- (port 1, port) Short format: in Al, DX (bytes) IN AX, DX (word) Performance: Al <- (DX)) (byte) AX <- ((DX) 1, DX) (word) .out output instruction long format is: OUT port, Al (byte) OUT, AX (word) Performance: (port) <- (al) (byte) (port 1 , Port) <- (ax) (word) Short format is: OUT DX, Al (byte) OUT DX, AX (word) Performance: ((DX)) <- (al) (byte) ((by) DX) 1, (DX)) <- ax (word) In the IBM-PC, the external device can have up to 65536 I / O ports, port (ie, the port address of the peripheral) is 0000 ~ fffh. 256 ports (0 ~ ffh) can be specified directly in the instruction, which is the port in the long format. At this time, the machine instruction is indicated by two bytes, which is the port number. So it can be used in a long format Specify the port number directly in the specified, but only the first 256 Port. When the port number> = 256, only a short format can be used. At this time, the port number must be placed in the DX register (the port number can be transmitted from 0000 to 0FFFH), and then use IN or OUT instruction to transmit information. The .XLAT Code Instruction Format is: XLAT OPR or: XLAT Performing: (Al) <- ((BX) (Al)) 3. Effective Address Send Register Instruction LEA (Load Effective Address) Effective Address Send Register LDS Load DS with Pointer Pointer Send Register and DSLES (Load Es With Pointer) Pointer Send Register and EsLEA Effective Address Send Register Format: Lea REG, SRC Performance: (REG) <- SRC Directive Pick up Source Operation Valid address is sent to the specified register .. LDS pointer send register and DS instruction format: LDS REG, SRC execution: (REG) <- (src) (ds) <- (src 2) Turnover the source operand The specified four successive bytes are sent to the registers and DS registers specified by the command. This command often specifies the SI register .. LES pointer send register and ES instruction format: LES REG, SRC execution: (REG) <- (SRC) (ES) <- (SRC
2) Send the four successive bytes specified by the source operand to the register and ES register specified by the command. This command often specifies the DI register. 4. Sign Register Transfer Instruction LAHF (Load Ah with flags) Sign to send AHSAHF (Store AH INTO FLAGS AH Send Sign Register Pushf (Push The Flags) Sign In Fact Popf (Pop The Flags) Sign Inn.lahf Sign Send AH Format: LAHF Performance: (AH) <- (low byte of PWS) ). SAHF AH send flag register format: SAHF execution: (low byte) <- (ah) .pushf flag Input stack format: PUSHF Performance: (SP) <- (sp) -2 (SP) 1, (SP)) <- (psw) .POPF logo Operating Stack Format: POPF Performance: (PWS) <- (SP) 1, (SP)) (SP) <- (SP 2) Second, Arithmetic Directive 1. Adc (Add with Carry) Belts Ad (Increment) plus 1.Add add instruction format: Add DST, SRC execution: (DST <- (src) (DST). ADC Belts Carrying Instruction Instruction Format: ADC DST, SRC Performance: (DST) <- (src) (DST) CF.Add plus 1 instruction format: Inc opr Performance: (OPR) <- (opR) 12. Subtraction command SUB (SUBTRACT) subtraction SBB (Subtract with borrow) Borrow subtraction Dec (Decrement) minus 1NEG (NEGATE) Follow CMP (Compare) Comparison. Sub Substation instruction format: SUB DST, SRC execution: (DST) <- (dST) - (src). SBB with borrow subtraction instruction format: SBB DST, SRC execution: (DST) <- (dst) - (Src) -CF.DEC minus 1 instruction format: Dec OPR execution: (OPR) <- (opr) -1.neg Solving Instruction Format: NEG OPR Performance: (OPR) <- - (opR) .CMP comparison instruction format: CMP OPR1, OPR2 Performance: (OPR1) - (OPR2) This instruction performs subtraction operation like the SUB instruction, but does not save the result, only according to The results set the conditional markers. Western hemisphere. 3. Multiplication Multiple No Symbol Multiplication Imul (Signed Multiple) with Symbol Multiplication.mul No Symbol Multiplication Instruction Format: MUL SRC Execution: Byte Operation: (AX <- (al) * (src) word operand: (dx, ax) <- (ax) * (src). IMUL band symbol number multiply instruction format: IMUL SRC execution: The same is the same as MUL, but must be With the number of symbols, but MUL is no symbol number. 4. Smbwor DIV (unsigned Divide) No Symbolic number division IDIV (Signed Divide) Belt Sense CBW (Convert Byte to Word) Byte Convert to Word CWD (Content Word To Double Word) Convert to Double Word. DIV No Symbolic Number Method Instruction Format: Div SRC Performing: byte Action: (AL) <- (AX) / (SRC) Business (AX) / (SRC) Operation: (AX) <- (DX, AX) / (SRC) The remainder of the commercial (AX) <- (dx, ax) / (src). IDIV band symbol number division instruction format: DIV SRC execution: The same as DIV, but the operand must be the number of symbols, the merchants and the remainder are the number of symbols, and the remainder symbol is the same as the divided symbol ..cbw byte converted to a word instruction format: CBW execution Operation: The content symbol of Al extends to AH. Ie, if the highest valid bit of (AL) is 0, (AH) = 00;
If the highest effective bit of (AL) is 1, (AH) = 0ffH.cwd word Convert to double word instruction format: CWD execution: AX content symbol extends to DX. That is, if (AX) has the highest effective bit of 0, then (dx) = 0; otherwise (dx) = 0ffffh. These two instructions do not affect the condition code. Third, logic instructions 1. Logical operation command and (AND) logic and or (or) logic or not Logic non-XOR (Exclusive OR) Dismorgia Test (TEST) Test .and Logic and Instruction Format: AND DST, SRC Performance: (DST) <- (dst) ^ (src) .or Logic or Instruction Format: OR DST, SRC execution: (DST) <- (dST) V (SRC) .NOT Logic Non-Instruction Format: NOT OPR Performing: (OPR) <- (opr) .xOR Dior Or Instruction Format: XOR DST, SRC execution: (DST) <- (dst) V
(SRC) .Test test instruction format: Test OPR1, OPR2 Performable Action: (DST) ^ (src) Two operands The result is not saved, only according to its characteristic condition code 2. Displacement instruction SHL (SHIFT Logical Left) Logic Left SAL (Shift Arithmetic LEFT) Movement SAR (Shift Logical Right) Logic Right Move SAR (Shift Arithmetic Right) Calculation Right Rol (Rotate LEFT) Cycle Leave Right Right Cycle Right Transfer RCL (Rotate Left Through Carry) Belts Revenue Right Through Carry Belt Route Right Movement Format: SHL OPR, CNT (Suitable Similar) where opr may be any addressing method other than immediately. The number of shifts is determined by the CNT, the CNT can be 1 or CL. The loop shift instruction can change the position of all bits in the operand; the shift instruction is often used to multiply by dividing by dividing 2, where arithmetic shift instructions apply The SAL is used by the symbol number, and the SAL is used to divide by 2; and the logical shift instruction is used to use no symbol count operation, SHL is used to multiply 2, the SHR is used to divide 2. Fourth, string processing instruction 1. MOVS, STOS, and LODS instructions work with the REP match. REP repeat operation until (CX) = 0 is the format: Rep String primitive where String Primitive can be performed for MOVs, LODS or STOS instructions: 1) (Cx) = 0 Exit the REP, otherwise the procedure is executed .2) (CX) <- (cx) -13) Perform a string operation 4) Repeat 1) ~ 3) .MOVS String Transfer Instruction Format: There are three kinds Movs DST, Src Movsb (byte) MOVSW (word) The three formats are explicitly indicated by transmitting bytes or words, and the first format should indicate whether it is a word or byte operation in the operand, for example. : MOVS ES: BYTE PTR [DI], DS: [Si] Performed: 1) ((DI)) <- ((Si)) 2) byte operation: (Si) <- (si) (or -) 1, (di) <- (dI) (or -) 1 When the direction flag DF = 0 is used in , when the direction flag DF = 1 - 3) word: ( Si) <- (si) (or -) 2 (DI) <- (dI) (or -) 2 When the direction flag DF = 0 is used , when the direction flag DF = 1 - the instruction is not Impact condition code .. Cld (Clear Direction Flag) This instruction makes DF = 0, allows the address to automatically increment when performing a string operation instruction; .std (SET Direction Flag) This instruction makes DF = 1, in executing a string operation instruction The address can be automatically reduced ..STOS stored in string instruction format: Stos DST Stosb (byte) Stosw (word) Operation: byte operation: ((DI)) <- (al), (di) < - (dI) - 1 word operation: ((DI)) <- (ax), (dI) <- (dI) - 2 This instruction stores the content of Al or AX into the additional segment specified by (DI) In a certain unit, and modify the contents of DI according to the value of DF and the data type, when it is coupled to the REP, the content of the Al or AX can be stored in a buffer (CX) buffer ..lods Instruction format: LODS SRC LODSB LODSW Operation: byte operation: (al) <- ((si)), (Si) <- (si) - 1 word operation: (AX) <- ((Si)) (SI) <- (si)
-2 This instruction sent the contents of a unit in a unit specified by (SI) to Al or AX, and modify the contents of Si according to the direction flag and data type. The instruction allows the segment to specify the storage of non-data segments. District. This instruction does not affect the condition code. Generally, the instruction is not connected to the REP. Sometimes a string of characters in the buffer requires sequential to take the test, can be used, and REPE / REPZ and REPNZ / Repne combined CMPS and SCAS instructions.Repe / REPZ Repeat String Operation Format: REPE / REPZ When String Primitive, String Primitive can be CMPS or SCAS instructions. Operation: 1) such as (CX ) = 0 or ZF = 0 (i.e., two operands of a certain comparison), exit, otherwise 2) (CX) <- (cx) -13) Perform subsequent skewers 4) Repeat 1) ~ 3). REPNE / RepNZ When no phase / not zero repeating string operation format: Repne (or repnz) Strimitive where String Primitive can perform a CMPS or SCAS directive: In addition to exit conditions (CX = 0) Outside of ZF = 1, other operations are identical to the REPE ..cmps string comparison instruction format: CMP SRC, DST CMPSB CMPSW Operation: 1) ((Si)) - 2) byte operation :( <- (si) - 1, (dI) <- (dI) - 1 word: (Si) <- (si) - 2, (di) <- (di) - 2 instruction One word (or byte) in the data segment pointed to by (Si) is subtracted from one of the words (or bytes) pointed to by (DI), but does not save the result, only the condition code is set according to the results. Other features of the instruction and the same specification of the MOVS instruction .. SCAS String Scan Instruction Format: SCAS DST SCASB SCASW Execution: byte Action: (AL) - ((DI)), (Di) <- (di) - 1 word operation: (al) - ((DI)), (DI) <- (dI) 2 This instruction puts the content of Al (or AX) and one byte specified by (DI) in the additional segment (Or words), does not save the result, only according to the results of the condition code. The other features of the instruction are the same as the MOVS regulations. VII control Transfer instructions 1. Unconditional transfer instructions. JMP (JMP) Jump command 1) Direct short transfer format: JMP Short OPR Performance: (IP) <- (IP) 8 Bit Displacement 2) Direct Near Transfer Format in Segment: JMP Near PTR OPR Performance: (IP) <- (IP) 16 Bit Displacement 3) During indirect transfer format: JMP Word PTR OPR Performance: (ip) <- (EA) 4) Direct (far) Transfer format: JMP FAR PTR OPR Performance: (IP) <- OPR segment Intergenerational Transfer format between Offset Address (CS) <- OPR: JMP DWORD PTR OPR Performing: (IP) <- (EA) (CS) <- (EA 2) 2. Condition Transfer Directive 1) Transfer. JZ (or JE) (JUMP if Zero, or Equal) result is zero (or equal), the transfer format: JE (or JZ) OPR test condition: zf = 1 .Jnz (or JNE) (JUMP if not zero, or not equal) does not turn zero (or non-pharmaceutically, etc.): JNZ (or JNE) OPR test condition: zf = 0.js (jump if sign) result is Negative Transfer Format: JS OPR Test Conditions: SF = 1.jns (Jump If Not Sign) Result is the regular transfer format: JNS OPR test conditions: sf = 0.jo (jump if overflow) Overflow Transfer format: JO OPR Test Condition: OF =
1. JNO (JUMP if not overflow) does not overflow, transfer format: JNO OPR test conditions: OF = 0.jp (or JPE) (JUMP IF PARITY, OR PARITY EVEN) parity bit is 1 transfer format: JP OPR test conditions : Pf = 1.jnp (or JPO) (JUMP if not Parity, or Parity ODD) parity is 0 Transfer format: JNP (or JPO) OPR Test Condition: PF = 0.JB (or JNAE, JC) (JUMP If BELOW, OR NOT ABOVE OR Equal, or Carry is lower, or not above or equal to, or carry bits are 1 transition format: JB (or JNAE, JC) OPR test conditions: cf = 1.jnb (or JAE , JNC) (JUMP if not Below, or not carry) is not lower, or higher than or equal to, or the carry bits are 0 Transfer format: JNB (or JAE, JNC) OPR Test Condition: CF = 02) Compare two unsigned numbers, and transfers. JB (or JNAE, JC) format according to comparison: the same .jnb (or jae, jnc) format: The same .jbe (or JNA) (Jump if Below or Equal, Or not ABOVE is below or equal to, or is not higher than the transfer format: JBE (or JNA) OPR test conditions: cfvzf = 1.jnbe (or JA) (JUMP if not Below or Equal, or Above) is not less than or Or equals, or higher than the transfer format: JNBE (or JA) OPR test condition: CFVZF = 03) Compare two band symbols, and transferred .jl (or LNGE) (Jump if less, or not greater OR) based on comparison Equal) is less than, or is not greater than or equal to the transfer format: JL (or JNGE) OPR test condition: SFV
Of = 1.jnl (or JGE) (JUMP if not length) is not less than, or is greater than or equal to the transfer format: JNL (or JGE) OPR test condition: sf
V
Of = 0.JLE (or JNG) (JUMP if Less or JNG) is less than or equal to, or is not greater than the transfer format: JLE (or JNG) OPR test condition: (sf
V
Of) VZF = 1.jnle (or JG) (JUMP if not length) is not less than or equal to, or greater than the transfer format: JNLE (or JG) OPR test condition: (sf
V
Of) VZF = 04) Test the value of CX is 0 Transfer instructions. The content of the JUMP IF CX Register is Zero CX register is zero transformation: JCXZ OPR test conditions: (cx) = 0 Note: Condition transfer For 8-bit short jump! 3. Cycle instruction .loop loop instruction format: Loop OPR Test Condition: (CX) <> 0.Loopz / Loope When zero or equal time cycle instruction format: loopz (or loope) OPR test condition: (Cx) <> 0 and zf = 1.Loopnz / loopne When not zero or non-equal time cycle instruction format: Loopnz (or Loopne) OPR test conditions: (CX) <> 0 and zf = 0 Steps for these three instructions Yes: 1) (CX) <- (cx) -12) Check if the test condition is met, if satisfied (IP) <- (ip) D8 symbol expansion. 4. Subprogram .call call instruction. Retur return instruction 5. Interrupt .int instruction format: INT TYPE or INT execution: (SP) <- (SP) -2 ((SP) 1, (SP)) <- (psw) (SP) <- (SP) -2 (SP) 1, (SP)) <- (cs) (SP) <- (SP) - 2 ((SP) 1, (SP)) <- (IP) (IP) <- ( TYPE * 4) (CS) <- (Type * 4 2). Into If overflows, the operation is interrupted: If OF = 1: (SP) <- (SP) -2 ((SP) 1, SP)) <- (PSW) <- (SP) -2 ((SP) 1, (SP)) <- (cs) (SP) <- (SP) -2 ((SP) 1 (SP)) <- (IP) <- (10H) (CS) <- (12H) .IRET Removes the Instruction Format from the Interrupt: IRET Performing: (IP) <- ((SP) 1 (SP)) (SP) <- (SP) 2 (CS) <- (SP) 1, (SP)) (SP) <- (SP) 2 (PSW) <- ((SP) 1, (sp)) (SP) <- (sp) 26, processor control command 1. Sign processing instruction. CLC carry position 0 instruction (Clear Carry) CF <-0.CMC portpoint request anti-instruction (Complement carry) CF <-CF .STC carry position 1 instruction (SET Carry) CF <-1.CLD Direction Directional Direction DF <-0.STD Direction Sign Set Direction DF <-1.CLI Interrupt Sign Set 0 Clear Interrupt IF <-0.sti Interrupt Sign Sets 1 Instruction (SET Interrupt) IF <