Keyboard scanning block
Outbit EQU 08002H; column address
IN EQU 08001H; line address
Delay:; latency subroutine
Mov r7, # 0
DelayLoop:
Djnz R7, DelayLoop
Djnz R6, DelayLoop
RET
TestKey:
Mov dptr, #outbit
Mov A, # 0
Movx @dptr, A; output line is 0
Mov dptr, #in
Movx a, @dptr; read key status
CPL A
ANL A, # 0fh; high four digits
RET
KeyTable:; Key code definition
DB 16H, 15H, 14H, 0FFH
DB 13h, 12h, 11h, 10h
DB 0DH, 0CH, 0BH, 0AH
DB 0EH, 03H, 06H, 09H
DB 0FH, 02H, 05H, 08H
DB 00H, 01H, 04H, 07H
GetKey:
Mov dptr, #outbit
MOV P2, DPH
MOV R0, #LOW (in)
Mov r1, # 00100000b
Mov r2, # 6
Kloop:
Mov A, R1; find out the key
CPL a
Movx @dptr, A
CPL A
RR a
MOV R1, A; next column
Movx a, @ r0
CPL a
ANL A, # 0fh
JNZ GOON1; this column is typed
Djnz R2, Kloop
MOV R2, # 0ffh; no key is pressed, return 0FFH
SJMP EXIT
Goon1:
MOV R1, A; key value = column x 4 line
Mov A, R2
Dec A
RL a
RL a
MOV R2, A; R2 = (R2-1) * 4
MOV A, R1; R1 is a row value read in
Mov r1, # 4
LOOPC:
RRC A; shift to find out
JC EXIT
INC R2; R2 = R2 row value
DJNZ R1, LOOPC
EXIT:
Mov A, R2; Remove key code
Mov dptr, #keytable
MOVC A, @ a dptr
MOV R2, A
Waitrelease:
MOV DPTR, #outbit; etc. Release
CLR A
Movx @dptr, A
Mov r6, # 10
Call delay
Call testkey
Jnz Waitrelease
Mov A, R2
RET
Outbit EQU 09002H; column address
IN EQU 09001H; line address
CWADD1 EQU 8000H; write instruction code address (E1)
DWADD1 EQU 8001H; Write Display Data Address (E1)
CRADD1 EQU 8002H; Read Status Cluster Address (E1)
DRADD1 EQU 8003H; Read Display Data Address (E1)
CWADD2 EQU 8004H; write instruction code address (E2)
DWADD2 EQU 8005H; write a number of addresses (E2)
CRADD2 EQU 8006H; Reading status word address (E2)
DRADD2 EQU 8007H; Read Display Data Address (E2)
Key_Value EQU 29h; key value
PD1 EQU 28H; 122/2 is divided into left and right screen 122x32
Column EQU 27H; Page_sed EQU 26H; Page Address Register D1, Do: Page Address
Code_sed EQU 25h; Character Code Register
Count EQU 24h; Counter
Dir EQU 23h
CTEMP EQU 22h
COM EQU 21h; instruction register
Dat EQU 20H; Data Register
ORG 0000H
LJMP START
START: MOV SP, # 60h
Key_Loop: LCALL TESTKEY
JZ Key_LOOP
LCALL Getkey
CJNE A, # 10h, no_show1
NO_SHOW1: JNC NO_SHOW2
Mov Key_Value, A
LCALL EXE_KEY
NO_SHOW2: SJMP Key_LOOP
Delay:; latency subroutine
Mov r7, # 0
DelayLoop:
Djnz R7, DelayLoop
Djnz R6, DelayLoop
RET
TestKey:
Mov dptr, #outbit
Mov A, # 0
Movx @dptr, A; output line is 0
Mov dptr, #in
Movx a, @dptr; read key status
CPL a
ANL A, # 0fh; high four digits
RET
KeyTable:; Key code definition
DB 16H, 15H, 14H, 0FFH
DB 13h, 12h, 11h, 10h
DB 0DH, 0CH, 0BH, 0AH
DB 0EH, 03H, 06H, 09H
DB 0FH, 02H, 05H, 08H
DB 00H, 01H, 04H, 07H
GetKey:
Mov dptr, #outbit
MOV P2, DPH
MOV R0, #LOW (in)
Mov r1, # 00100000b
Mov r2, # 6
Kloop:
Mov A, R1; find out the key
CPL a
Movx @dptr, A
CPL a
RR a
MOV R1, A; next column
Movx a, @ r0
CPL a
ANL A, # 0fh
JNZ GOON1; this column is typed
Djnz R2, Kloop
MOV R2, # 0ffh; no key is pressed, return 0FFH
SJMP EXIT
Goon1:
MOV R1, A; key value = column x 4 line
Mov A, R2
Dec A
RL a
RL a
MOV R2, A; R2 = (R2-1) * 4
MOV A, R1; R1 is a row value read in
Mov r1, # 4
LOOPC:
RRC A; shift to find out
JC EXIT
INC R2; R2 = R2 row value
DJNZ R1, LOOPC
EXIT:
Mov A, R2; Remove key code
Mov dptr, #keytable
MOVC A, @ a dptr
MOV R2, A
Waitrelease:
MOV DPTR, #outbit; etc. Release
CLR A
Movx @dptr, A
Mov r6, # 10
Call delay
Call testkey
Jnz Waitrelease
Mov A, R2
RET
; 8 * 16-digit character display block
EXE_KEY: LCALL INIT
LCALL CLEAR
Mov ctemp, # 0
Mov Dir, # 0
Mov page_sed, # 00H
Mov column, # 0
MOV code_sed, key_value
LCALL WRI_EN816
RET
; ---------------------------------------
Initializer
INIT: MOV COM, # 0e2h; reset
LCALL PR0
LCALL PR3
MOV COM, # 0A4H; Close closed state
LCALL PR0
LCALL PR3
MOV COM, # 0A9H; Set 1/32 duty cycle
LCALL PR0
LCALL PR3
MOV COM, # 0A0H; forward sort setting
LCALL PR0
LCALL PR3
MOV COM, # 0C0H; Set the first line of display start behavior
LCALL PR0
LCALL PR3
Mov COM, # 0afh; open display settings
LCALL PR0
LCALL PR3
RET
; ------------------------------------------------
Qingping screen
CLEAR: MOV R4, # 00H; Page Address Speech
CLEAR1: MOV A, R4; page address value
Orl A, # 0b8h; "or" page address setting code
MOV COM, A; page address setting
LCALL PR0
LCALL PR3
MOV COM, # 00H; column address is set to "0"
LCALL PR0
LCALL PR3
MOV R3, # 50h; one page 80 bytes
CLEAR2: MOV DAT, # 00H; Display data is "0"
LCALL PR1
LCALL PR4
Djnz R3, Clear2; Page byte clear cycle
Inc R4; Page Address Transmission
CJNE R4, # 04H, Clear1; RAM area clear cycle
RET
; -----------------------------------
;1. Write instruction code subroutine (E1)
PR0: PUSH DPL
Push DPH
MOV DPTR, # cradd1; set the read status word address
PR01: MOVX A, @ DPTR; Read status word
JB ACC.7, PR01; Judgment "Busy" flag is "0", no read
Mov dptr, # cwadd1; set write instruction code address
MOV A, COM; take instruction code
MOVX @ DPTR, A; write instruction code
POP DPH
POP DPL
RET
; ------------------------------------
; 2. Write the display data subroutine (E1)
PR1: PUSH DPL
Push DPH
MOV DPTR, # cradd1; set the read status word address
PR11: MOVX A, @ DPTR; reading status
JB ACC.7, PR11; Judgment "Busy" flag is "0", no read
MOV DPTR, # dwadd1; set write display data address
MOV A, DAT; Take data
Movx @ DPTR, A; write data
POP DPH
POP DPL
RET
; -------------------------------------
; 3. Read the display data subprogram (E1)
PR2: PUSH DPL
Push DPH
MOV DPTR, # cradd1; set the read status word address
PR21: MOVX A, @ DPTR; Read status word
JB ACC.7, PR21; Judgment "Busy" flag is "0" No, no read
Mov dptr, # Dradd1; setup read display data address
Movx a, @ DPTR; read data
MOV DAT, A; save data
POP DPH
POP DPL
RET
; -------------------------------------; 4. Write instruction code subroutine (E2)
PR3: PUSH DPL
Push DPH
MOV DPTR, # cradd2; set the read status word address
PR31: MOVX A, @ DPTR; read status word
JB ACC.7, PR31; Judgment "Busy" Chen Zhi is "0" No, no read
MOV DPTR, # cwadd2; set the write instruction code address
MOV A, COM; take instruction code
MOVX @ DPTR, A; write instruction code
POP DPH
POP DPL
RET
; -------------------------------------
; 5. Write the display data subroutine (E2)
PR4: PUSH DPL
Push DPH
MOV DPTR, # cradd2; set the read status word address
PR41: MOVX A, @ DPTR; Read status word
JB ACC.7, PR41; Judgment "Bus" flag "0" No, no read
MOV DPTR, # dwadd2; set write display data address
MOV A, DAT; Take data
Movx @ DPTR, A; write data
POP DPH
POP DPL
RET
; ---------------------------------------
; 6. Read the display data subroutine (E2)
PR5: PUSH DPL
Push DPH
MOV DPTR, # cradd2; set the read status word address
PR51: MOVX A, @ DPTR; Read status word
JB ACC.7, PR51; Judgment "Busy" sign is "0", no longer read
Mov dptr, # dradd2; setting write display data address
Movx a, @ DPTR; read data
MOV DAT, A; save data
POP DPH
POP DPL
RET
; 8 * 16-digit character display block
WRI_EN816: MOV DPTR, # CCTAB; Determine the character character module
Mov A, Code_sed; Troublesh
MOV B, # 10h; word module width is 16 bytes
Mul ab; code × 16
Add A, DPL; character character module
MOV DPL, A; word model library home address code × 16
Mov A, B
AddC a, DPH
MOV DPH, A
CLR 50H
Push column
Push column
Mov code_sed, # 00H; Code register borrowed as a firm register
WRI_1: Mov Count, # 8h; Counter Settings to 8
MOV A, Page_sed; Read Address Register
ANL A, # 03H; Take the page address valid value
Orl A, # 0b8h; "or" page address set code
MOV COM, A; Settings page address
LCALL PR0
LCALL PR3
POP column
MOV A, Column; Reading address register
CLR C
Subb A, # pd1; column address - module parameters
JC WRI_2; <0 is the left half screen display area (E1)
Mov Column, A; ≥0 is the right half screen display area (E2)
Setb 50h; Set the area flag.
WRI_2: MOV COM, Column; Settings Column Address Value
JNB 50H, WRI_3
LCALL PR3; region E2
SJMP WRI_4
WRI_3: LCALL PR0; Region E1
WRI_4: MOV A, CODE_SED; Take the internet register value
MOVC A, @ a dptr; taking Chinese character model data
MOV DAT, A; write data
Mov A, Page_sed
JNB 50H, WRI_5
LCALL PR4; region E2
SJMP WRI_6
WRI_5: LCALL PR1; Region E1WRI_6: Inc code_sed; in the address register plus one
INC column; column address register plus one
MOV A, Column; Determine whether the address is exceeded in the area,
CJNE A, #PD1, WRI_7
WRI_7: JC WRI_8; Continue
JB 50H, WRI_8; exit in the area E2
Setb 50h; modified to zone E2 in the area E1
MOV COM, # 00H; Setting area E2 column address is "0"
LCALL PR3
WRI_8: DJNZ Count, WRI_4; When the page loop
MOV A, Page_sed; Read Address Register
JB ACC.7, WRI_9; sentenced to complement the logo D7 bit, "1" completes the exit
INC A; otherwise page address plus one
Setb ACC.7; set into a bit of "1"
MOV Page_sed, A
CLR 50H
Mov code_sed, # 8h; the inline register is set to 8
LJMP WRI_1; large cycle
WRI_9: RET
; --------------------------------------
Character library
CCTAB:
; 0
DB 0F8H, 0FCH, 004H, 0C4H, 024H, 0FCH, 0F8H, 000H
DB 007H, 00FH, 009H, 008H, 008H, 00FH, 007H, 000H
;1
DB 000H, 010H, 018H, 0FCH, 0FCH, 000H, 000H, 000H
DB 000H, 008H, 008H, 00FH, 00FH, 008H, 008H, 000H
;2
DB 008H, 00CH, 084H, 0C4H, 064H, 03CH, 018H, 000H
DB 00EH, 00FH, 009H, 008H, 008H, 00CH, 00Ch, 000H
; 3
DB 008H, 00CH, 044H, 044H, 044H, 0FCH, 0B8H, 000H
DB 004H, 00CH, 008H, 008H, 008H, 00FH, 007H, 000H
; 4
DB 0C0H, 0E0H, 0B0H, 098H, 0FCH, 0FCH, 080H, 000H
DB 000H, 000H, 000H, 008H, 00FH, 00FH, 008H, 000H
; 5
DB 07CH, 07CH, 044H, 044H, 0C4H, 0C4H, 084H, 000H
DB 004H, 00CH, 008H, 008H, 008H, 00FH, 007H, 000H
; 6
DB 0F0H, 0F8H, 04CH, 044H, 044H, 0C0H, 080H, 000H
DB 007H, 00FH, 008H, 008H, 008H, 00FH, 007H, 000H
; 7
DB 00CH, 00CH, 004H, 084H, 0C4H, 07CH, 03CH, 000H
DB 000H, 000H, 00FH, 00FH, 000H, 000H, 000H, 000H
;8
DB 0B8H, 0FCH, 044H, 044H, 044H, 0FCH, 0B8H, 000H
DB 007H, 00FH, 008H, 008H, 008H, 00FH, 007H, 000H
;9
DB 038H, 07CH, 044H, 044H, 044H, 0FCH, 0F8H, 000H
DB 000H, 008H, 008H, 008H, 00CH, 007H, 003H, 000H
A
DB 0E0H, 0F0H, 098H, 08CH, 098H, 0F0H, 0E0H, 000H
DB 00FH, 00FH, 000H, 000H, 000H, 00FH, 00FH, 000H
; B
DB 004H, 0FCH, 0FCH, 044H, 044H, 0FCH, 0B8H, 000H
DB 008H, 00FH, 00FH, 008H, 008H, 00FH, 007H, 000H
; C
DB 0F0H, 0F8H, 00CH, 004H, 004H, 00CH, 018H, 000H
DB 003H, 007H, 00CH, 008H, 008H, 00CH, 006H, 000H
D
DB 004H, 0FCH, 0FCH, 004H, 00CH, 0F8H, 0F0H, 000H
DB 008H, 00FH, 00FH, 008H, 00CH, 007H, 003H, 000H
; E
DB 004H, 0FCH, 0FCH, 044H, 0E4H, 00CH, 01CH, 000H
DB 008H, 00FH, 00FH, 008H, 008H, 00CH, 00Eh, 000H
; F
DB 004H, 0FCH, 0FCH, 044H, 0E4H, 00CH, 01CH, 000H
DB 008H, 00FH, 00FH, 008H, 000H, 000H, 000H, 000H
; ----------------------------------.
