Makefile Concise Guide (2)

xiaoxiao2021-03-06  69

Inference Rules (derivation rules)

Inference Rules (hereinafter referred to as IR) is a template that determines how to construct a file with another extension from a file with some extension. NMAKE determines the command to update the target of Target through IR and derive the target of Target. The advantage of IR is that it satisfies the needs of lazy people like me. As long as the correct IR is provided, the descriptive sentence block can be greatly understood. Please see the example below:

FOO.OBJ:

The above statement will work very well. Is it very surprised? In fact, when the nmake is handling the statement, it first searches for a file that is fundamentally known as FOO in the current directory (assuming a foo.c file in the current directory). Then it looks for a suffix list (SUFFIX LIST), each item contains another type of file that needs to be called from a type of file to construct another type of file that needs to be called. In the NMAKE predefined list, the constructor of foo.c to the foo.obj is CL. Finally Nmake calls CL, compile foo.c. Oh, such a long string operation is a simple statement, is it very convenient!

When one of the following conditions occurs, NMAKE will try to use IR:

l Nmake encountered a descriptive sentence block without any commands. At this point, NMAKE searches for a list of lumen, trying to find a matching command to construct Target.

l I can't find a Dependent, and the dependent does not appear as a target in other dependent line (ie it is not a Pseudotarget). At this time, NMAKE searches for a given directory and the suffix list, attempting to find an IR to construct the dependent.

l A target doesn't have Dependent, and the instruction is not given in the description block. At this time, NMAKE will try to find an IR to construct the Target.

l A Target gives a target line in the NMAKE, but there is no relevant information on the target (no makefile at the Makefile). At this time, NMAKE will try to find an IR to construct the Target.

Define the syntax of an IR as follows:

[{fromPath}]. FROMEXT [{TOPATH}].

Commands

Note that there is no space between each syntax element. Dependent's suffix name is given in FROMEXT, and the suffix name of the target is given in TOEXT. FromPath and Topath are optional and the path of search is given. A search path can only be given to each suffix name in the definition of each IR. If you want to specify a plurality of search paths, you must define multiple IRs. And, if you specify a search path for a suffix, you must also specify a search path for another suffix. That is to say, from FRMEXT and TOPATH as long as there is an existence, the other must exist. You can use {.} Or {} to represent the current directory.

Also, pay attention to that if you specify the search path in IR, you must also specify the same path in the Dependent Lien, otherwise IR will not be applied to Dependent Line, for example:

{../proj }.exe {./proj }.obj:

This IR will not be used on the following statement:

Project1.exe: Project1.obj

But it will be used on the following statements:

{../proj }Project1.exe: {../proj}Project1.obj

Nmake itself provides a predefined suffix list, as follows: Rule Command Default Action

.asm.exe $ (AS) $ (AFLAGS) $ *. ASM ml $ *. ASM

.ASM.Obj $ (AS) $ (AFLAGS) / C $ *. ASM ML / C $ *. ASM

.c.exe $ (cc) $ (cflags) $ *. ccl $ *. c

. C.Obj $ (CC) $ (cflags) / c $ *. C CL / C $ *. c

. cpp.exe $ (cpp) $ (cppflags) $ *. CPP CL $ *. CPP

. cpp.obj $ (CPP) $ (CPPFLAGS) / C $ *. CPP CL / C $ *. CPP

.cxx.exe $ (cxx) $ (cxxflags) $ *. CXX CL $ *. CXX

.cxx.obj $ (cxx) $ (cxxflags) / c $ *. CXX CL / C $ *. CXX

.BAS.OBJ $ (BC) $ (bflags) $ *. BAS; bc $ *.

. CBL.EXE $ (COBFLAGS) $ *. CBL, $ *. EXE; COBOL $ *. CBL, $ *. EXE;

. CBL.Obj $ (COBOL) $ (COBFLAGS) $ *. CBL; COBOL $ *. CBL;

. EXE $ (for) $ (fflags) $ *. for fl $ *.

.Obj $ (for) / c $ (fflags) $ *. for fl / c $ *.

.PAS.EXE $ (PASCAL) $ (PFLAGS) $ *. PAS PL $ *. PAS

.PAS.OBJ $ (PASCAL) / C $ (pflags) $ *. PAS PL / C $ *. PAS

.rc.res $ (rc) $ (RFLAGS) / R $ * RC / R $ *

In the above table, similar AFLAG and CFLAG are not defined in parentheses, by defining these macros in Makefile, the compiler and parameters can be specified for these commands. E.g:

$ (AS) $ (AFLAGS) $ *. ASM

The AS macro is used to specify the compiler, and the NMAKE is default the ml; the AFLAGS macro is used to give the compiler parameters, and the NMAKE leaves it to the user definition, the default is empty. So the default operation is:

ML $ *. ASM

Here you can see the grammar to open the macro, that is, enclose the name of the macro with parentheses and add a dollar sign in front. It is also necessary to explain that "$ *" is a special macro predefined NMAKE predefined, which is equal to the path to Target plus the basic name of the target. Macro

This is very familiar with everyone. Great flexibility can be obtained by using macros in Makefile. Below is the syntax that defines the macro in makefile:

Macroname = String

In Makefile, Macroname is the name of the macro, which can be a combination of any letters, numbers, and underscores, up to 1024 characters. Also note that macroname is sensitive. String is a macro defined body, which can have up to 65,510 characters. Any string containing 0 characters or only a blank is considered a null string. At this time, the macro is also considered null, anywhere, will be replaced with a blank.

When using the macro, you should also know the following symbols with special meaning:

L # for comments, for example:

Command = ml # Compile ASM File

l / write macro definitions to write, for example:

Linkcmd = link myapp /

Another, NUL, MYLIB, MyApp

"/" The back-on-return line will be replaced by the space, and the above two lines are equivalent to:

Linkcmd = link myapp Another, NUL, MYLIB, MyApp

L $ will open the macro and use it later.

L ^ If you want to include the above symbols in the macro, you can use the special semantics, you can:

DIR = C: / windows ^ /

At this point, DIR is equivalent to the string "C: / Windows /".

Here are some details of some syntax:

1) When defining a macro, the first character of the macro name must be the first character of the line;

2) You can only define a macro per line;

3) There may be spaces on both sides of "=", but they will be ignored;

4) There can be space in the macro definition body, which will be considered part of the macro;

In addition to defining macros in Makefile, macro definitions can also appear in the nmake command line. At this point, if there is any blank in the macro definition, you must have a double quotation mark, for example:

Nmake "linkcmd = link / map"

Nmake linkcmd = "link / map"

In this way, it is not allowed (the equal sign is spaced):

Nmake linkcmd = "link / map"

The syntax using the macro is as follows (note that there is no space in the entire statement):

$ (Macroname)

NMAKE will replace the entire statement with macro. If the macro is not defined, NMAKE will replace it with blank, and no error will occur. If the name of the macro has only one character, the parentheses can be omitted, for example, $ 1 and $ (L) are equivalent.

Nmake has also provided a very useful feature for macros, that is, Substitution. That is, when the macro is expanded, you can specify that some of the text in the unfolded macro is replaced with additional text. For example: Source = one.c two.c

Foo.exe: $ (Source: .c = .obj)

LINK $ **;

This is this:

Source = one.c two.c

Foo.exe: one.obj tour.obj

Link one.obj two.obj;

Statements $ (source: .c = .Obj) indicates that all ".c" that appears in Source is ".Obj".

As can be seen from the above example, the syntax of the substection is as follows (note, no space):

$ (Macroname: str1 = str2)

In addition, NMAKE also provides 4 sets of predefined macros, which are file name macros, recursive macros, command macros, and parameter macros. They can be redefined, but may cause some unnecessary trouble because they are widely used. The so-called "moving one-to-hammer", a small change, and even affect the movement of the sun, the butterfly effect), which is the largest drawback of the use of macros.

File name Hong

Use in Commands Block to represent a specific file name, including:

1) $ @ used to indicate the full name of the first Target in the associated Dependent Line (including path).

2) $$ @ 同, but only in Dependent Line.

3) $ * Target's path plus basic name.

4) $ ** All dependents in the corresponding Dependent Line.

5) $? All TIME stamps in the corresponding Dependent Line are greater than the target of Target.

6) $ 同 同, but only in IR.

Below is an example:

DIR = C: / Objects

$ (DIR) /A.OBJ: A.OBJ

Copy a.obj $ @ @ @

The last sentence is equivalent to: Copy a.obj C: /Objects/a.obj

In addition, when using these macros, you can also extract one of the file names by the following characters:

D path

B basic name

F basic name plus extension

R path plus basic name

For example: if $ @ means C: /Objects/a.object,

$ (@ D) C: / Objects

$ (@ B) a

$ (@ F) a.obj

$ (@ R) c: / Objects / a

Recursive

There are 3, they are all used to easily call the NMAKE in makefile, they are:

1) MAKE

Indicates the name of the NMAKE program running the current Makefile. For example, if you run your Makefile in the console:

NMAKE HER.MAK

Then Make is equal to NMAKE.

But if you rename nmake.exe for fuck.exe, then you run makefile commands should be changed to: fuck Her.mak

At this point, MAKE is equal to Fuck.

2) Makedir

Indicates the directory where you call NMAKE.

3) Makeflags

Indicates the NMAKE parameters you run when you run the current makefile.

These macros are particularly useful at different versions of the Build program, such as:

All: VERS1 VERS2

VERS1:

CD / VERS1

$ (Make)

CD ..

Vers2:

CD / VERS2

$ (MAKE) / f Vers2.mak

CD ..

NMAKE will run Vers1.mak and Vers2.mak in ./vers1 and ./vers2 directory.

Command macro and parameter macro

Command macro indicates Microsoft's compiler (really will do business, do not forget your own product at any time), and parameter macro is the parameter passed to these compilers. In the default, the parameter macro is undefined. of. Of course, you can redefine them and let them represent Boland's compiler and parameters.

Command macro corresponding parameter macro

1) As ML, M assembly compiler. Aflags

2) BASIC compiler of BC BC and M. Bflags

3) C compiler of CC CL, M. Cflags

4) COBOL COBOL compiler of Cobol Cobol. Cobflags

5) C compiler of CPP CL, M. CPPFlags

6) C compiler of CXX CL, M. CXXFlags

7) For fl, m's Fortran compiler. Fflags

8) PASCAL compiler of PASCAL PL, M. Pflags

9) Resource compiler of RC RC and M. Rflags

转载请注明原文地址:https://www.9cbs.com/read-85910.html

New Post(0)